diff python/msp430.py @ 203:ca1ea402f6a1

Added some arm instructions
author Windel Bouwman
date Sat, 15 Jun 2013 19:13:05 +0200
parents f22b431f4113
children
line wrap: on
line diff
--- a/python/msp430.py	Sat Jun 15 10:02:50 2013 +0200
+++ b/python/msp430.py	Sat Jun 15 19:13:05 2013 +0200
@@ -12,25 +12,6 @@
 #TODO: add more modes!
 IMMEDIATE_MODE = 7
 
-
-
-# Add a custom operand mapping method:
-def mapOp(self, operand):
-    if type(operand) is ASymbol:
-        # try to map to register:
-        regs = {}
-        for r in self.registers:
-            regs[r.name] = r
-        if operand.name in regs:
-            reg = regs[operand.name]
-            return MSP430Operand(REGISTER_MODE, reg.num)
-    elif type(operand) is ANumber:
-        # Immediate mode:
-        return MSP430Operand(IMMEDIATE_MODE, operand.number)
-    raise CompilerError('Cannot map {0}'.format(operand))
-
-msp430target.mapOperand = types.MethodType(mapOp, msp430target)
-
 # Target description for the MSP430 processor
 
 class MSP430Reg(Register):
@@ -83,7 +64,20 @@
         if self.mode == IMMEDIATE_MODE:
             return pack_ins(self.param)
         return bytes()
-        
+    
+    @classmethod
+    def Create(cls, vop):
+        if type(vop) is ASymbol:
+            # try to map to register:
+            regs = {}
+            for r in msp430target.registers:
+                regs[r.name] = r
+            if vop.name in regs:
+                reg = regs[vop.name]
+                return cls(REGISTER_MODE, reg.num)
+        elif type(vop) is ANumber:
+            # Immediate mode:
+            return cls(IMMEDIATE_MODE, vop.number)
 
 def pack_ins(h):
     return struct.pack('<H', h)