diff python/testregalloc.py @ 280:02385f62f250

Rework from str interface to Instruction interface
author Windel Bouwman
date Sat, 02 Nov 2013 10:03:26 +0100
parents 2ccd57b1d78c
children
line wrap: on
line diff
--- a/python/testregalloc.py	Sat Oct 12 09:56:23 2013 +0200
+++ b/python/testregalloc.py	Sat Nov 02 10:03:26 2013 +0100
@@ -1,9 +1,10 @@
 import unittest
 import os
 import sys
-import irmach
+from irmach import AbstractInstruction as makeIns, Frame
 import registerallocator
 import ir
+from target import Nop
 
 
 class RegAllocTestCase(unittest.TestCase):
@@ -11,7 +12,7 @@
         self.ra = registerallocator.RegisterAllocator()
 
     def testRegAlloc(self):
-        f = irmach.Frame('tst')
+        f = Frame('tst')
         f.regs = [1,2,3,4,5,6] # for test use numbers!
         f.tempMap = {}
         t1 = ir.Temp('t1')
@@ -19,12 +20,12 @@
         t3 = ir.Temp('t3')
         t4 = ir.Temp('t4')
         t5 = ir.Temp('t5')
-        f.instructions.append(irmach.makeIns('ld %d0', dst=[t1]))
-        f.instructions.append(irmach.makeIns('ld %d0', dst=[t2]))
-        f.instructions.append(irmach.makeIns('ld %d0', dst=[t3]))
-        f.instructions.append(irmach.makeIns('add %d0, %s0, %s1', dst=[t4], src=[t1, t2]))
-        f.instructions.append(irmach.makeIns('add %d0, %s0, %s1', dst=[t5], src=[t4, t3]))
-        f.instructions.append(irmach.makeIns('st %s0', src=[t5]))
+        f.instructions.append(makeIns(Nop, dst=[t1]))
+        f.instructions.append(makeIns(Nop, dst=[t2]))
+        f.instructions.append(makeIns(Nop, dst=[t3]))
+        f.instructions.append(makeIns(Nop, dst=[t4], src=[t1, t2]))
+        f.instructions.append(makeIns(Nop, dst=[t5], src=[t4, t3]))
+        f.instructions.append(makeIns(Nop, src=[t5]))
         self.ra.allocFrame(f)
         self.conflict(t1, t2)
         self.conflict(t2, t3)
@@ -33,7 +34,7 @@
         self.assertNotEqual(self.ra.Node(ta).color, self.ra.Node(tb).color)
 
     def testRegCoalesc(self):
-        f = irmach.Frame('tst')
+        f = Frame('tst')
         f.regs = [1,2,3,4,5,6] # for test use numbers!
         f.tempMap = {}
         t1 = ir.Temp('t1')
@@ -42,18 +43,15 @@
         t4 = ir.Temp('t4')
         t5 = ir.Temp('t5')
         t6 = ir.Temp('t6')
-        f.instructions.append(irmach.makeIns('ld %d0', dst=[t1]))
-        f.instructions.append(irmach.makeIns('ld %d0', dst=[t2]))
-        f.instructions.append(irmach.makeIns('ld %d0', dst=[t3]))
-        f.instructions.append(irmach.makeIns('lsl %s0, %s1', dst=[t4], src=[t2, t1]))
-        f.instructions.append(irmach.makeIns('mov %d0, %s0', dst=[t5], src=[t3]))
-        f.instructions.append(irmach.makeIns('orr %s0, %s1', dst=[t5], src=[t4, t5]))
-        f.instructions.append(irmach.makeIns('mov %d0, %s0', dst=[t6], src=[t5]))
-        f.instructions.append(irmach.makeIns('st %s0', src=[t6]))
+        f.instructions.append(makeIns(Nop, dst=[t1]))
+        f.instructions.append(makeIns(Nop, dst=[t2]))
+        f.instructions.append(makeIns(Nop, dst=[t3]))
+        f.instructions.append(makeIns(Nop, dst=[t4], src=[t2, t1]))
+        f.instructions.append(makeIns(Nop, dst=[t5], src=[t3]))
+        f.instructions.append(makeIns(Nop, dst=[t5], src=[t4, t5]))
+        f.instructions.append(makeIns(Nop, dst=[t6], src=[t5]))
+        f.instructions.append(makeIns(Nop, src=[t6]))
         self.ra.allocFrame(f)
-        f.ig.to_txt()
-        for i in f.instructions:
-            print(i)
         self.conflict(t1, t2)
         self.conflict(t2, t3)
         self.conflict(t1, t3)