--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/test/testregalloc.py	Fri Nov 15 13:43:22 2013 +0100
@@ -0,0 +1,61 @@
+import unittest
+import os
+import sys
+from irmach import AbstractInstruction as makeIns, Frame
+import registerallocator
+import ir
+from target import Nop
+
+
+class RegAllocTestCase(unittest.TestCase):
+    def setUp(self):
+        self.ra = registerallocator.RegisterAllocator()
+
+    def testRegAlloc(self):
+        f = Frame('tst')
+        f.regs = [1,2,3,4,5,6] # for test use numbers!
+        f.tempMap = {}
+        t1 = ir.Temp('t1')
+        t2 = ir.Temp('t2')
+        t3 = ir.Temp('t3')
+        t4 = ir.Temp('t4')
+        t5 = ir.Temp('t5')
+        f.instructions.append(makeIns(Nop, dst=[t1]))
+        f.instructions.append(makeIns(Nop, dst=[t2]))
+        f.instructions.append(makeIns(Nop, dst=[t3]))
+        f.instructions.append(makeIns(Nop, dst=[t4], src=[t1, t2]))
+        f.instructions.append(makeIns(Nop, dst=[t5], src=[t4, t3]))
+        f.instructions.append(makeIns(Nop, src=[t5]))
+        self.ra.allocFrame(f)
+        self.conflict(t1, t2)
+        self.conflict(t2, t3)
+
+    def conflict(self, ta, tb):
+        self.assertNotEqual(self.ra.Node(ta).color, self.ra.Node(tb).color)
+
+    def testRegCoalesc(self):
+        f = Frame('tst')
+        f.regs = [1,2,3,4,5,6] # for test use numbers!
+        f.tempMap = {}
+        t1 = ir.Temp('t1')
+        t2 = ir.Temp('t2')
+        t3 = ir.Temp('t3')
+        t4 = ir.Temp('t4')
+        t5 = ir.Temp('t5')
+        t6 = ir.Temp('t6')
+        f.instructions.append(makeIns(Nop, dst=[t1]))
+        f.instructions.append(makeIns(Nop, dst=[t2]))
+        f.instructions.append(makeIns(Nop, dst=[t3]))
+        f.instructions.append(makeIns(Nop, dst=[t4], src=[t2, t1]))
+        f.instructions.append(makeIns(Nop, dst=[t5], src=[t3]))
+        f.instructions.append(makeIns(Nop, dst=[t5], src=[t4, t5]))
+        f.instructions.append(makeIns(Nop, dst=[t6], src=[t5]))
+        f.instructions.append(makeIns(Nop, src=[t6]))
+        self.ra.allocFrame(f)
+        self.conflict(t1, t2)
+        self.conflict(t2, t3)
+        self.conflict(t1, t3)
+
+if __name__ == '__main__':
+    unittest.main()
+