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comparison python/codegenarm.py @ 262:ed14e077124c

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Added conditional branch instructions
author Windel Bouwman
date Fri, 09 Aug 2013 11:30:11 +0200
parents 444b9df2ed99
children 5ec7580976d9
comparison
equal deleted inserted replaced
261:444b9df2ed99 262:ed14e077124c
2 import ir 2 import ir
3 from target import Label, Comment, Alignment, LabelRef, Imm32, DebugInfo 3 from target import Label, Comment, Alignment, LabelRef, Imm32, DebugInfo
4 import cortexm3 as arm 4 import cortexm3 as arm
5 from ppci import CompilerError 5 from ppci import CompilerError
6 import irmach 6 import irmach
7
8
9 class InstructionSelector:
10 pass
11
12
13 class RegisterAllocator:
14 pass
15
7 16
8 class ArmCodeGenerator: 17 class ArmCodeGenerator:
9 """ 18 """
10 Simple code generator 19 Simple code generator
11 Ad hoc implementation 20 Ad hoc implementation
171 self.emit(arm.pop_ins(arm.RegisterSet({arm.r3, arm.r4, arm.r5, arm.r6, arm.r7, arm.pc}))) 180 self.emit(arm.pop_ins(arm.RegisterSet({arm.r3, arm.r4, arm.r5, arm.r6, arm.r7, arm.pc})))
172 elif type(ins) is ir.ConditionalBranch: 181 elif type(ins) is ir.ConditionalBranch:
173 r0 = self.getreg(ins.a) 182 r0 = self.getreg(ins.a)
174 r1 = self.getreg(ins.b) 183 r1 = self.getreg(ins.b)
175 self.emit(arm.cmp_ins(r1, r0)) 184 self.emit(arm.cmp_ins(r1, r0))
176 tgt_yes = Label(ins.lab1.name) 185 tgt_yes = LabelRef(ins.lab1.name)
177 if ins.cond == '==': 186 if ins.cond == '==':
178 self.emit(arm.beq_ins(tgt_yes)) 187 self.emit(arm.beq_ins(tgt_yes))
188 elif ins.cond == '<':
189 self.emit(arm.blt_ins(tgt_yes))
190 elif ins.cond == '>':
191 self.emit(arm.bgt_ins(tgt_yes))
179 else: 192 else:
180 raise NotImplementedError('"{}" not covered'.format(ins.cond)) 193 raise NotImplementedError('"{}" not covered'.format(ins.cond))
181 tgt_no = Label(ins.lab2.name) 194 tgt_no = LabelRef(ins.lab2.name)
182 self.emit(arm.jmp_ins(tgt_no)) 195 self.emit(arm.b_ins(tgt_no))
183 self.freereg(ins.a, ins) 196 self.freereg(ins.a, ins)
184 self.freereg(ins.b, ins) 197 self.freereg(ins.b, ins)
185 elif type(ins) is ir.Alloc: 198 elif type(ins) is ir.Alloc:
186 # Local variables are added to stack 199 # Local variables are added to stack
187 self.addStack(ins.value) 200 self.addStack(ins.value)