Mercurial > lcfOS
comparison python/stm32f4/blink.c3 @ 232:e621e3ba78d2
Added left shift instruction
author | Windel Bouwman |
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date | Sun, 14 Jul 2013 11:50:58 +0200 |
parents | 521567d17388 |
children | 6ed3d3a82a63 |
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231:521567d17388 | 232:e621e3ba78d2 |
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1 // This file blinks a LED on the STM32F4 discovery board. | 1 /* This file blinks a LED on the STM32F4 discovery board. |
2 | |
3 the board has 4 leds on PD12, PD13, PD14 and PD15 | |
4 | |
5 */ | |
6 | |
2 package blink; | 7 package blink; |
3 | 8 |
4 type struct { | 9 type struct { |
5 int MODER; | 10 int MODER; |
6 int OTYPER; | 11 int OTYPER; |
9 int IDR; | 14 int IDR; |
10 int ODR; | 15 int ODR; |
11 }* GPIO_Type; | 16 }* GPIO_Type; |
12 | 17 |
13 type struct { | 18 type struct { |
14 } RCC_Type; | 19 int CR; |
20 int PLLCFGR; | |
21 int CFGR; | |
22 int CIR; | |
23 int AHB1RSTR; | |
24 int AHB2RSTR; | |
25 int AHB3RSTR; | |
26 int reserved0; | |
27 int APB1RSTR; | |
28 int APB2RSTR; | |
29 int reserved1a, reserved1b; | |
30 int AHB1ENR; | |
31 int AHB2ENR; | |
32 int AHB3ENR; | |
33 int reserved2; | |
34 int APB1ENR, APB2ENR; | |
35 }* RCC_Type; | |
15 | 36 |
16 | 37 |
17 // Functions: | 38 // Functions: |
18 function void main() | 39 function void main() |
19 { | 40 { |
20 var int APB1PERIPH_BASE; | 41 // Memory mapped control registers: |
21 APB1PERIPH_BASE = 0x40000000 | |
22 //var int | |
23 var GPIO_Type GPIOD; | 42 var GPIO_Type GPIOD; |
24 GPIOD = cast<GPIO_Type>(0x400000); | 43 GPIOD = cast<GPIO_Type>(0x40020C00); |
44 var RCC_Type RCC; | |
45 RCC = cast<RCC_Type>(0x40023800); | |
25 | 46 |
26 var int* RCC_AHB1ENR; | 47 // Enable the clock to port D: |
27 RCC_AHB1ENR = cast<int*>(0x40003022); | 48 RCC->AHB1ENR = RCC->AHB1ENR | 0x8; |
28 *RCC_AHB1ENR = *RCC_AHB1ENR | 8943; | 49 |
29 /* | 50 |
30 RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; | 51 // PD13 == output (01) |
31 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; | 52 GPIOD->MODER = (1 << 26); |
32 | 53 GPIOD->ODR = (1 << 13); |
33 GPIOD->MODER = (1<<26); | 54 |
34 | |
35 NVIC->ISER[0] |= 1<< (TIM2_IRQn); | |
36 | |
37 TIM2->PSC = 0xE000; | |
38 TIM2->DIER |= TIM_DIER_UIE; | |
39 TIM2->ARR = 0xE000; | |
40 TIM2->CR1 |= TIM_CR1_ARPE | TIM_CR1_CEN; | |
41 TIM2->EGR = 1; | |
42 | |
43 */ | |
44 while(true) {} | 55 while(true) {} |
45 } | 56 } |
46 | 57 |