comparison python/codegenarm.py @ 259:ac603eb66b63

Added function call
author Windel Bouwman
date Mon, 05 Aug 2013 20:41:25 +0200
parents 04c19282a5aa
children 444b9df2ed99
comparison
equal deleted inserted replaced
258:04c19282a5aa 259:ac603eb66b63
37 # Manually inserted startup code: 37 # Manually inserted startup code:
38 self.dcd(0x20000678) # initial stack ptr 38 self.dcd(0x20000678) # initial stack ptr
39 # TODO: use label here: 39 # TODO: use label here:
40 #self.emit(arm.dcd_ins(LabelRef('reset'))) # reset vector 40 #self.emit(arm.dcd_ins(LabelRef('reset'))) # reset vector
41 self.dcd(0x08000009) # reset vector, lsb indicates thumb mode 41 self.dcd(0x08000009) # reset vector, lsb indicates thumb mode
42 self.emit(arm.bl_ins(LabelRef('main')))
42 43
43 self.emit(Label('reset')) 44 self.emit(Label('reset'))
44 for f in ircode.Functions: 45 for f in ircode.Functions:
45 self.localVars = [] 46 self.localVars = []
46 # Add global variable addresses to immediate list: 47 # Add global variable addresses to immediate list:
130 # The value was alloc'ed 131 # The value was alloc'ed
131 self.emit(arm.str_sprel(r0, arm.MemSpRel(self.getStack(ins.location)))) 132 self.emit(arm.str_sprel(r0, arm.MemSpRel(self.getStack(ins.location))))
132 else: 133 else:
133 r1 = self.getreg(ins.location) 134 r1 = self.getreg(ins.location)
134 self.emit(arm.storeimm5_ins(r0, arm.MemR8Rel(r1, 0))) 135 self.emit(arm.storeimm5_ins(r0, arm.MemR8Rel(r1, 0)))
135 self.freereg(ins.location, ins) 136 self.freereg(ins.location, ins)
136 self.freereg(ins.value, ins) 137 self.freereg(ins.value, ins)
137 elif type(ins) is ir.Load: 138 elif type(ins) is ir.Load:
138 # TODO: differ global and local?? 139 # TODO: differ global and local??
139 #self.getGlobal(arm.r0, ins.location) 140 #self.getGlobal(arm.r0, ins.location)
140 r0 = self.getreg(ins.value) 141 r0 = self.getreg(ins.value)
141 if ins.location in self.localVars: 142 if ins.location in self.localVars:
142 self.emit(arm.ldr_sprel(r0, arm.MemSpRel(self.getStack(ins.location)))) 143 self.emit(arm.ldr_sprel(r0, arm.MemSpRel(self.getStack(ins.location))))
143 else: 144 else:
144 r2 = self.getreg(ins.location) 145 r2 = self.getreg(ins.location)
145 self.emit(arm.loadimm5_ins(r0, arm.MemR8Rel(r2, 0))) 146 self.emit(arm.loadimm5_ins(r0, arm.MemR8Rel(r2, 0)))
146 self.freereg(ins.location, ins) 147 self.freereg(ins.location, ins)
147 elif type(ins) is ir.BinaryOperator: 148 elif type(ins) is ir.BinaryOperator:
148 # Load operands: 149 # Load operands:
149 r0 = self.getreg(ins.value1) 150 r0 = self.getreg(ins.value1)
150 r1 = self.getreg(ins.value2) 151 r1 = self.getreg(ins.value2)
151 r2 = self.getreg(ins.result) 152 r2 = self.getreg(ins.result)
160 self.emit(arm.orrregs_ins(r2, r1)) 161 self.emit(arm.orrregs_ins(r2, r1))
161 else: 162 else:
162 raise NotImplementedError('operation {} not implemented'.format(ins.operation)) 163 raise NotImplementedError('operation {} not implemented'.format(ins.operation))
163 self.freereg(ins.value1, ins) 164 self.freereg(ins.value1, ins)
164 self.freereg(ins.value2, ins) 165 self.freereg(ins.value2, ins)
166 elif type(ins) is ir.Call:
167 # TODO: prep parameters:
168 self.emit(arm.bl_ins(LabelRef(ins.callee.name)))
165 elif type(ins) is ir.Return: 169 elif type(ins) is ir.Return:
166 self.emit(arm.pop_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6, arm.r7, arm.pc}))) 170 self.emit(arm.pop_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6, arm.r7, arm.pc})))
167 elif type(ins) is ir.ConditionalBranch: 171 elif type(ins) is ir.ConditionalBranch:
168 r0 = self.getreg(ins.a) 172 r0 = self.getreg(ins.a)
169 r1 = self.getreg(ins.b) 173 r1 = self.getreg(ins.b)