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comparison python/stlink.py @ 123:9f1094b1587a

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Cleanup
author Windel Bouwman
date Sat, 12 Jan 2013 12:52:18 +0100
parents 347d7d8b96c0
children d38729d35c4d
comparison
equal deleted inserted replaced
122:aaa4939a7942 123:9f1094b1587a
154 stlink_v = b0 >> 4 154 stlink_v = b0 >> 4
155 jtag_v = ((b0 & 0xf) << 2) | (b1 >> 6) 155 jtag_v = ((b0 & 0xf) << 2) | (b1 >> 6)
156 swim_v = b1 & 0x3f 156 swim_v = b1 & 0x3f
157 vid = (b3 << 8) | b2 157 vid = (b3 << 8) | b2
158 pid = (b5 << 8) | b4 158 pid = (b5 << 8) | b4
159
160 return 'stlink={0} jtag={1} swim={2} vid:pid={3:04X}:{4:04X}'.format(\ 159 return 'stlink={0} jtag={1} swim={2} vid:pid={3:04X}:{4:04X}'.format(\
161 stlink_v, jtag_v, swim_v, vid, pid) 160 stlink_v, jtag_v, swim_v, vid, pid)
162 Version = property(getVersion) 161 Version = property(getVersion)
163 162
164 @property 163 @property
441 print('chip id: 0x{0:X}'.format(i)) 440 print('chip id: 0x{0:X}'.format(i))
442 print('cpu: {0}'.format(sl.CpuId)) 441 print('cpu: {0}'.format(sl.CpuId))
443 442
444 print('status: {0}'.format(sl.StatusString)) 443 print('status: {0}'.format(sl.StatusString))
445 444
446 #time.sleep(2.2)
447
448 # test registers: 445 # test registers:
449 sl.write_reg(3, 0x1337) 446 sl.write_reg(3, 0x1337)
450 sl.write_reg(2, 0x1332) 447 sl.write_reg(2, 0x1332)
451 sl.write_reg(6, 0x12345) 448 sl.write_reg(6, 0x12345)
452 assert sl.read_reg(3) == 0x1337 449 assert sl.read_reg(3) == 0x1337