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comparison python/ppci/target/arm/armv7.lidl @ 342:86b02c98a717 devel

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Moved target directory
author Windel Bouwman
date Sat, 01 Mar 2014 15:40:31 +0100
parents python/target/armv7.lidl@44f336460c2a
children
comparison
equal deleted inserted replaced
341:4d204f6f7d4e 342:86b02c98a717
1
2 # This file specifies the encoding of the arm instruction set.
3
4 fields {
5 word16 16 {
6 opcode 15:12
7 top2 15:14
8 top6 15:10
9 data_opcode 9..6
10 opB 11:9
11 Rm 8:6
12 Rn 5:3
13 Rt 2:0
14 }
15 }
16
17 patterns {
18 add = 0
19 sub, mul = 1..2
20 [r1, r2, r3, r4, r5] is todo = 1..5
21 [STR, STRH, STRB, LDRSB, LDR, LDRH, LDRB, LDRSH] is opcode = 0b0101 & opB = {0 to 7}
22
23 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL = 0..14
24 [AND, EOR, LSL, LSR, ASR, ADC, SBC, ROR, TST, RSB, CMP, CMN, ORR, MUL, BIC, MVN] is 0..15
25
26 memop is STR | STRH | STRB | LDRSB | LDR | LDR | LDRH | LDRB | LDRSH
27 }
28
29
30 constructors
31 {
32 alu rs1, reg_or_imm, rd
33 memop Rt, [Rn, Rm] is memop & Rt & Rn & Rm
34 }
35
36