Mercurial > lcfOS

comparison python/codegenarm.py @ 234:83781bd10fdb

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
wip
author Windel Bouwman
date Sun, 14 Jul 2013 19:29:21 +0200
parents e621e3ba78d2
children ff40407c0240
comparison
equal deleted inserted replaced
233:d3dccf12ca88 234:83781bd10fdb
1 import ir 1 import ir
2 from asmnodes import ALabel, AComment 2 from target import Label, Comment
3 import cortexm3 as arm 3 import cortexm3 as arm
4 from ppci import CompilerError 4 from ppci import CompilerError
5 5
6 class ArmCodeGenerator: 6 class ArmCodeGenerator:
7 """ 7 """
35 # Add global variable addresses to immediate list: 35 # Add global variable addresses to immediate list:
36 for gvar in ircode.Variables: 36 for gvar in ircode.Variables:
37 pass #self.imms.append(( 37 pass #self.imms.append((
38 38
39 self.stack_frame = [] 39 self.stack_frame = []
40 self.emit(ALabel(f.name)) 40 self.emit(Label(f.name))
41 # Save some registers: 41 # Save some registers:
42 self.emit(arm.push_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6,arm.r7,arm.lr}))) 42 self.emit(arm.push_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6,arm.r7,arm.lr})))
43 for bb in f.BasicBlocks: 43 for bb in f.BasicBlocks:
44 self.emit(ALabel(bb.name)) 44 self.emit(Label(bb.name))
45 for ins in bb.Instructions: 45 for ins in bb.Instructions:
46 self.generateInstruction(ins) 46 self.generateInstruction(ins)
47 47
48 self.outs.align(4) 48 self.outs.align(4)
49 while self.imms: 49 while self.imms:
50 l, v = self.imms.pop() 50 l, v = self.imms.pop()
51 self.emit(ALabel(l)) 51 self.emit(Label(l))
52 self.emit(arm.dcd_ins(v)) 52 self.emit(arm.dcd_ins(v))
53 self.outs.align(4) 53 self.outs.align(4)
54 54
55 # Helper functions: 55 # Helper functions:
56 def getStack(self, v): 56 def getStack(self, v):
63 _global_address = g.name + '__global' 63 _global_address = g.name + '__global'
64 self.emit(arm.ldr_pcrel(r, ALabel(_global_address))) 64 self.emit(arm.ldr_pcrel(r, ALabel(_global_address)))
65 def loadStack(self, reg, val): 65 def loadStack(self, reg, val):
66 self.emit(arm.ldr_sprel(reg, arm.MemSpRel(self.getStack(val)))) 66 self.emit(arm.ldr_sprel(reg, arm.MemSpRel(self.getStack(val))))
67 def comment(self, txt): 67 def comment(self, txt):
68 self.emit(AComment(txt)) 68 self.emit(Comment(txt))
69 69
70 def generateInstruction(self, ins): 70 def generateInstruction(self, ins):
71 self.comment(str(ins)) 71 self.comment(str(ins))
72 if type(ins) is ir.Branch: 72 if type(ins) is ir.Branch:
73 tgt = ALabel(ins.target.name) 73 tgt = Label(ins.target.name)
74 self.emit(arm.jmp_ins(tgt)) 74 self.emit(arm.jmp_ins(tgt))
75 elif type(ins) is ir.ImmLoad: 75 elif type(ins) is ir.ImmLoad:
76 lname = ins.target.name + '_ivalue' 76 lname = ins.target.name + '_ivalue'
77 self.emit(arm.ldr_pcrel(arm.r0, ALabel(lname))) 77 self.emit(arm.ldr_pcrel(arm.r0, Label(lname)))
78 self.imms.append((lname, ins.value)) 78 self.imms.append((lname, ins.value))
79 self.emit(arm.str_sprel(arm.r0, arm.MemSpRel(self.addStack(ins.target)))) 79 self.emit(arm.str_sprel(arm.r0, arm.MemSpRel(self.addStack(ins.target))))
80 elif type(ins) is ir.Store: 80 elif type(ins) is ir.Store:
81 # Load value in r0: 81 # Load value in r0:
82 self.loadStack(arm.r0, ins.value) 82 self.loadStack(arm.r0, ins.value)