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comparison python/ppci/target/thumb/arm.brg @ 357:818be710e13d

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Added acceptance function to burg
author Windel Bouwman
date Fri, 14 Mar 2014 15:14:29 +0100
parents 86b02c98a717
children 577ed7fb3fe4
comparison
equal deleted inserted replaced
356:52492b304adf 357:818be710e13d
12 %terminal MOVI32 12 %terminal MOVI32
13 13
14 %% 14 %%
15 15
16 16
17 reg: ADDI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Add3, dst=[d], src=[$1, $2]); return d .) 17 reg: ADDI32(reg, reg) 2 'd = self.newTmp(); self.emit(Add3, dst=[d], src=[c0, c1]); return d'
18 reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub3, dst=[d], src=[$1, $2]); return d .) 18 reg: SUBI32(reg, reg) 2 'd = self.newTmp(); self.emit(Sub3, dst=[d], src=[c0, c1]); return d'
19 reg: ORI32(reg, reg) 2 (. d = self.newTmp(); self.selector.move(d, $1); self.emit(Orr, dst=[], src=[d, $2]); return d .) 19 reg: ORI32(reg, reg) 2 'd = self.newTmp(); self.selector.move(d, c0); self.emit(Orr, dst=[], src=[d, c1]); return d'
20 reg: SHLI32(reg, reg) 2 (. d = self.newTmp(); self.selector.move(d, $1); self.emit(Lsl, dst=[], src=[d, $2]); return d .) 20 reg: SHLI32(reg, reg) 2 'd = self.newTmp(); self.selector.move(d, c0); self.emit(Lsl, dst=[], src=[d, c1]); return d'
21 reg: MULI32(reg, reg) 2 (. d = self.newTmp(); self.selector.move(d, $1); self.emit(Mul, dst=[d], src=[$2, d]); return d .) 21 reg: MULI32(reg, reg) 2 'd = self.newTmp(); self.selector.move(d, c0); self.emit(Mul, dst=[d], src=[c1, d]); return d'
22 22
23 reg: CONSTI32 3 (. d = self.newTmp(); ln = self.selector.frame.addConstant($$.value); self.emit(Ldr3, dst=[d], others=[ln]); return d .) 23 reg: CONSTI32 3 'd = self.newTmp(); ln = self.selector.frame.addConstant(tree.value); self.emit(Ldr3, dst=[d], others=[ln]); return d'
24 reg: MEMI32(reg) 4 (. d = self.newTmp(); self.emit(Ldr2, dst=[d], src=[$1], others=[0]); return d .) 24 reg: MEMI32(reg) 4 'd = self.newTmp(); self.emit(Ldr2, dst=[d], src=[c0], others=[0]); return d'
25 reg: REGI32 1 (. return $$.value .) 25 reg: REGI32 1 'return tree.value'
26 reg: CALL 1 (. return self.selector.munchCall($$.value) .) 26 reg: CALL 1 'return self.selector.munchCall(tree.value)'
27 27
28 28
29 stmt: MOVI32(MEMI32(addr), reg) 3 (. self.emit(Str2, src=[$1, $2]) .) 29 stmt: MOVI32(MEMI32(addr), reg) 3 'self.emit(Str2, src=[c0, c1])'
30 30
31 addr: reg 2 (. .) 31 addr: reg 0 ''