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comparison test/testx86asm.py @ 292:534b94b40aa8

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Fixup reorganize
author Windel Bouwman
date Wed, 27 Nov 2013 08:06:42 +0100
parents 1c7c1e619be8
children 3b0c495e3008
comparison
equal deleted inserted replaced
290:7b38782ed496 292:534b94b40aa8
1 #!/usr/bin/python 1 #!/usr/bin/python
2 2
3 import unittest 3 import unittest
4 from testasm import AsmTestCaseBase
4 5
5 6
6 class AssemblerTestCase(unittest.TestCase): 7 class AssemblerTestCase(AsmTestCaseBase):
7 """ 8 """
8 test methods start with 'test*' 9 test methods start with 'test*'
9 Checks several assembly constructs agains their bytecodes 10 Checks several assembly constructs agains their bytecodes
10 """ 11 """
11 def setUp(self): 12 def setUp(self):
12 self.skipTest('not implemented yet') 13 self.skipTest('not implemented yet')
13 self.assembler = Assembler('x86-64') 14 self.assembler = Assembler('x86-64')
15 a = Assembler()
14 16
15 def tstAssembler(self): 17 @unittest.skip
18 def testX86(self):
19 self.feed('mov rax, rbx') # ; 0x48, 0x89, 0xd8
20 self.feed('xor rcx, rbx') # ; 0x48, 0x31, 0xd9
21 self.feed('inc rcx') # ; 0x48 0xff 0xc1
22 self.check('48 89 d8 48 31 d9 48 ff c1')
23
24 def tstAssembler(self):
16 """ Check all kind of assembler cases """ 25 """ Check all kind of assembler cases """
17 assert(assembler.shortjump(5) == [0xeb, 0x5]) 26 assert(assembler.shortjump(5) == [0xeb, 0x5])
18 assert(assembler.shortjump(-2) == [0xeb, 0xfc]) 27 assert(assembler.shortjump(-2) == [0xeb, 0xfc])
19 assert(assembler.shortjump(10,'GE') == [0x7d, 0xa]) 28 assert(assembler.shortjump(10,'GE') == [0x7d, 0xa])
20 assert(assembler.nearjump(5) == [0xe9, 0x5,0x0,0x0,0x0]) 29 assert(assembler.nearjump(5) == [0xe9, 0x5,0x0,0x0,0x0])
21 assert(assembler.nearjump(-2) == [0xe9, 0xf9, 0xff,0xff,0xff]) 30 assert(assembler.nearjump(-2) == [0xe9, 0xf9, 0xff,0xff,0xff])
22 assert(assembler.nearjump(10,'LE') == [0x0f, 0x8e, 0xa,0x0,0x0,0x0]) 31 assert(assembler.nearjump(10,'LE') == [0x0f, 0x8e, 0xa,0x0,0x0,0x0])
23 32
24 def testCall(self): 33 def testCall(self):
25 assert(assembler.call('r10') == [0x41, 0xff, 0xd2]) 34 self.feed('call r10')
26 assert(assembler.call('rcx') == [0xff, 0xd1]) 35 self.check('')
36 self.feed('call rcx')
37
38 # assert(assembler.call('r10') == [0x41, 0xff, 0xd2])
39 # assert(assembler.call('rcx') == [0xff, 0xd1])
27 40
28 def testXOR(self): 41 def testXOR(self):
29 assert(assembler.xorreg64('rax', 'rax') == [0x48, 0x31, 0xc0]) 42 assert(assembler.xorreg64('rax', 'rax') == [0x48, 0x31, 0xc0])
30 assert(assembler.xorreg64('r9', 'r8') == [0x4d, 0x31, 0xc1]) 43 assert(assembler.xorreg64('r9', 'r8') == [0x4d, 0x31, 0xc1])
31 assert(assembler.xorreg64('rbx', 'r11') == [0x4c, 0x31, 0xdb]) 44 assert(assembler.xorreg64('rbx', 'r11') == [0x4c, 0x31, 0xdb])
32 45
33 def testINC(self): 46 def testINC(self):
34 assert(assembler.increg64('r11') == [0x49, 0xff, 0xc3]) 47 assert(assembler.increg64('r11') == [0x49, 0xff, 0xc3])
35 assert(assembler.increg64('rcx') == [0x48, 0xff, 0xc1]) 48 assert(assembler.increg64('rcx') == [0x48, 0xff, 0xc1])
36 49
37 def testPush(self): 50 def testPush(self):
38 assert(assembler.push('rbp') == [0x55]) 51 assert(assembler.push('rbp') == [0x55])
39 assert(assembler.push('rbx') == [0x53]) 52 assert(assembler.push('rbx') == [0x53])
40 assert(assembler.push('r12') == [0x41, 0x54]) 53 assert(assembler.push('r12') == [0x41, 0x54])
41 def testPop(self):
42 assert(assembler.pop('rbx') == [0x5b])
43 assert(assembler.pop('rbp') == [0x5d])
44 assert(assembler.pop('r12') == [0x41, 0x5c])
45 54
46 def testAsmLoads(self): 55 def testPop(self):
56 self.feed('pop rbx')
57 self.feed('pop rbp')
58 self.feed('pop r12')
59 assert(assembler.pop('rbx') == [0x5b])
60 assert(assembler.pop('rbp') == [0x5d])
61 assert(assembler.pop('r12') == [0x41, 0x5c])
62
63 def testAsmLoads(self):
47 # TODO constant add testcases 64 # TODO constant add testcases
48 assert(assembler.mov('rbx', 'r14') == [0x4c, 0x89, 0xf3]) 65 assert(assembler.mov('rbx', 'r14') == [0x4c, 0x89, 0xf3])
49 assert(assembler.mov('r12', 'r8') == [0x4d, 0x89, 0xc4]) 66 assert(assembler.mov('r12', 'r8') == [0x4d, 0x89, 0xc4])
50 assert(assembler.mov('rdi', 'rsp') == [0x48, 0x89, 0xe7]) 67 assert(assembler.mov('rdi', 'rsp') == [0x48, 0x89, 0xe7])
51 68
52 def testAsmMemLoads(self): 69 def testAsmMemLoads(self):
53 assert(assembler.mov('rax', ['r8','r15',0x11]) == [0x4b,0x8b,0x44,0x38,0x11]) 70 assert(assembler.mov('rax', ['r8','r15',0x11]) == [0x4b,0x8b,0x44,0x38,0x11])
54 assert(assembler.mov('r13', ['rbp','rcx',0x23]) == [0x4c,0x8b,0x6c,0xd,0x23]) 71 assert(assembler.mov('r13', ['rbp','rcx',0x23]) == [0x4c,0x8b,0x6c,0xd,0x23])
55 72
56 assert(assembler.mov('r9', ['rbp',-0x33]) == [0x4c,0x8b,0x4d,0xcd]) 73 assert(assembler.mov('r9', ['rbp',-0x33]) == [0x4c,0x8b,0x4d,0xcd])
57 #assert(assembler.movreg64('rbx', ['rax']) == [0x48, 0x8b,0x18]) 74 #assert(assembler.movreg64('rbx', ['rax']) == [0x48, 0x8b,0x18])
59 assert(assembler.mov('rax', [0xb000]) == [0x48,0x8b,0x4,0x25,0x0,0xb0,0x0,0x0]) 76 assert(assembler.mov('rax', [0xb000]) == [0x48,0x8b,0x4,0x25,0x0,0xb0,0x0,0x0])
60 assert(assembler.mov('r11', [0xa0]) == [0x4c,0x8b,0x1c,0x25,0xa0,0x0,0x0,0x0]) 77 assert(assembler.mov('r11', [0xa0]) == [0x4c,0x8b,0x1c,0x25,0xa0,0x0,0x0,0x0])
61 78
62 assert(assembler.mov('r11', ['RIP', 0xf]) == [0x4c,0x8b,0x1d,0x0f,0x0,0x0,0x0]) 79 assert(assembler.mov('r11', ['RIP', 0xf]) == [0x4c,0x8b,0x1d,0x0f,0x0,0x0,0x0])
63 80
64 def testAsmMemStores(self): 81 def testAsmMemStores(self):
65 assert(assembler.mov(['rbp', 0x13],'rbx') == [0x48,0x89,0x5d,0x13]) 82 assert(assembler.mov(['rbp', 0x13],'rbx') == [0x48,0x89,0x5d,0x13])
66 assert(assembler.mov(['r12', 0x12],'r9') == [0x4d,0x89,0x4c,0x24,0x12]) 83 assert(assembler.mov(['r12', 0x12],'r9') == [0x4d,0x89,0x4c,0x24,0x12])
67 assert(assembler.mov(['rcx', 0x11],'r14') == [0x4c,0x89,0x71,0x11]) 84 assert(assembler.mov(['rcx', 0x11],'r14') == [0x4c,0x89,0x71,0x11])
68 85
69 86
70 assert(assembler.mov([0xab], 'rbx') == [0x48,0x89,0x1c,0x25,0xab,0x0,0x0,0x0]) 87 assert(assembler.mov([0xab], 'rbx') == [0x48,0x89,0x1c,0x25,0xab,0x0,0x0,0x0])
71 assert(assembler.mov([0xcd], 'r13') == [0x4c,0x89,0x2c,0x25,0xcd,0x0,0x0,0x0]) 88 assert(assembler.mov([0xcd], 'r13') == [0x4c,0x89,0x2c,0x25,0xcd,0x0,0x0,0x0])
72 89
73 assert(assembler.mov(['RIP', 0xf], 'r9') == [0x4c,0x89,0x0d,0x0f,0x0,0x0,0x0]) 90 assert(assembler.mov(['RIP', 0xf], 'r9') == [0x4c,0x89,0x0d,0x0f,0x0,0x0,0x0])
74 91
75 def testAsmMOV8(self): 92 def testAsmMOV8(self):
76 assert(assembler.mov(['rbp', -8], 'al') == [0x88, 0x45, 0xf8]) 93 assert(assembler.mov(['rbp', -8], 'al') == [0x88, 0x45, 0xf8])
77 assert(assembler.mov(['r11', 9], 'cl') == [0x41, 0x88, 0x4b, 0x09]) 94 assert(assembler.mov(['r11', 9], 'cl') == [0x41, 0x88, 0x4b, 0x09])
78 95
79 assert(assembler.mov(['rbx'], 'al') == [0x88, 0x03]) 96 assert(assembler.mov(['rbx'], 'al') == [0x88, 0x03])
80 assert(assembler.mov(['r11'], 'dl') == [0x41, 0x88, 0x13]) 97 assert(assembler.mov(['r11'], 'dl') == [0x41, 0x88, 0x13])
81 98
82 def testAsmLea(self): 99 def testAsmLea(self):
83 assert(assembler.leareg64('r11', ['RIP', 0xf]) == [0x4c,0x8d,0x1d,0x0f,0x0,0x0,0x0]) 100 assert(assembler.leareg64('r11', ['RIP', 0xf]) == [0x4c,0x8d,0x1d,0x0f,0x0,0x0,0x0])
84 assert(assembler.leareg64('rsi', ['RIP', 0x7]) == [0x48,0x8d,0x35,0x07,0x0,0x0,0x0]) 101 assert(assembler.leareg64('rsi', ['RIP', 0x7]) == [0x48,0x8d,0x35,0x07,0x0,0x0,0x0])
85 102
86 assert(assembler.leareg64('rcx', ['rbp', -8]) == [0x48,0x8d,0x4d,0xf8]) 103 assert(assembler.leareg64('rcx', ['rbp', -8]) == [0x48,0x8d,0x4d,0xf8])
87 104
88 def testAssemblerCMP(self): 105 def testAssemblerCMP(self):
89 assert(assembler.cmpreg64('rdi', 'r13') == [0x4c, 0x39, 0xef]) 106 assert(assembler.cmpreg64('rdi', 'r13') == [0x4c, 0x39, 0xef])
90 assert(assembler.cmpreg64('rbx', 'r14') == [0x4c, 0x39, 0xf3]) 107 assert(assembler.cmpreg64('rbx', 'r14') == [0x4c, 0x39, 0xf3])
91 assert(assembler.cmpreg64('r12', 'r9') == [0x4d, 0x39, 0xcc]) 108 assert(assembler.cmpreg64('r12', 'r9') == [0x4d, 0x39, 0xcc])
92 109
93 assert(assembler.cmpreg64('rdi', 1) == [0x48, 0x83, 0xff, 0x01]) 110 assert(assembler.cmpreg64('rdi', 1) == [0x48, 0x83, 0xff, 0x01])
94 assert(assembler.cmpreg64('r11', 2) == [0x49, 0x83, 0xfb, 0x02]) 111 assert(assembler.cmpreg64('r11', 2) == [0x49, 0x83, 0xfb, 0x02])
95 def testAssemblerADD(self): 112
113 def testAssemblerADD(self):
96 assert(assembler.addreg64('rbx', 'r13') == [0x4c, 0x01, 0xeb]) 114 assert(assembler.addreg64('rbx', 'r13') == [0x4c, 0x01, 0xeb])
97 assert(assembler.addreg64('rax', 'rbx') == [0x48, 0x01, 0xd8]) 115 assert(assembler.addreg64('rax', 'rbx') == [0x48, 0x01, 0xd8])
98 assert(assembler.addreg64('r12', 'r13') == [0x4d, 0x01, 0xec]) 116 assert(assembler.addreg64('r12', 'r13') == [0x4d, 0x01, 0xec])
99 117
100 assert(assembler.addreg64('rbx', 0x13) == [0x48, 0x83, 0xc3, 0x13]) 118 assert(assembler.addreg64('rbx', 0x13) == [0x48, 0x83, 0xc3, 0x13])
101 assert(assembler.addreg64('r11', 0x1234567) == [0x49, 0x81, 0xc3, 0x67, 0x45,0x23,0x1]) 119 assert(assembler.addreg64('r11', 0x1234567) == [0x49, 0x81, 0xc3, 0x67, 0x45,0x23,0x1])
102 assert(assembler.addreg64('rsp', 0x33) == [0x48, 0x83, 0xc4, 0x33]) 120 assert(assembler.addreg64('rsp', 0x33) == [0x48, 0x83, 0xc4, 0x33])
103 121
104 def testAssemblerSUB(self): 122 def testAssemblerSUB(self):
105 assert(assembler.subreg64('rdx', 'r14') == [0x4c, 0x29, 0xf2]) 123 assert(assembler.subreg64('rdx', 'r14') == [0x4c, 0x29, 0xf2])
106 assert(assembler.subreg64('r15', 'rbx') == [0x49, 0x29, 0xdf]) 124 assert(assembler.subreg64('r15', 'rbx') == [0x49, 0x29, 0xdf])
107 assert(assembler.subreg64('r8', 'r9') == [0x4d, 0x29, 0xc8]) 125 assert(assembler.subreg64('r8', 'r9') == [0x4d, 0x29, 0xc8])
108 126
109 assert(assembler.subreg64('rsp', 0x123456) == [0x48, 0x81, 0xec, 0x56,0x34,0x12,0x0]) 127 assert(assembler.subreg64('rsp', 0x123456) == [0x48, 0x81, 0xec, 0x56,0x34,0x12,0x0])
110 assert(assembler.subreg64('rsp', 0x12) == [0x48, 0x83, 0xec, 0x12]) 128 assert(assembler.subreg64('rsp', 0x12) == [0x48, 0x83, 0xec, 0x12])
111 129
112 def testAssemblerIDIV(self): 130 def testAssemblerIDIV(self):
113 assert(assembler.idivreg64('r11') == [0x49, 0xf7, 0xfb]) 131 assert(assembler.idivreg64('r11') == [0x49, 0xf7, 0xfb])
114 assert(assembler.idivreg64('rcx') == [0x48, 0xf7, 0xf9]) 132 assert(assembler.idivreg64('rcx') == [0x48, 0xf7, 0xf9])
115 assert(assembler.idivreg64('rsp') == [0x48, 0xf7, 0xfc]) 133 assert(assembler.idivreg64('rsp') == [0x48, 0xf7, 0xfc])
116 134
117 def testAssemblerIMUL(self): 135 def testAssemblerIMUL(self):
118 assert(assembler.imulreg64_rax('rdi') == [0x48, 0xf7, 0xef]) 136 assert(assembler.imulreg64_rax('rdi') == [0x48, 0xf7, 0xef])
119 assert(assembler.imulreg64_rax('r10') == [0x49, 0xf7, 0xea]) 137 assert(assembler.imulreg64_rax('r10') == [0x49, 0xf7, 0xea])
120 assert(assembler.imulreg64_rax('rdx') == [0x48, 0xf7, 0xea]) 138 assert(assembler.imulreg64_rax('rdx') == [0x48, 0xf7, 0xea])
121 139
122 assert(assembler.imulreg64('r11', 'rdi') == [0x4c, 0xf, 0xaf, 0xdf]) 140 assert(assembler.imulreg64('r11', 'rdi') == [0x4c, 0xf, 0xaf, 0xdf])