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comparison python/target/armtarget.py @ 341:4d204f6f7d4e devel

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Rewrite of assembler parts
author Windel Bouwman
date Fri, 28 Feb 2014 18:07:14 +0100
parents c7cc54c0dfdf
children
comparison
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340:c7cc54c0dfdf 341:4d204f6f7d4e
1 import struct 1 import struct
2 from .basetarget import Register, Instruction, Target, Label, LabelRef 2 from .basetarget import Register, Instruction, Target, Label, Alignment
3 from .basetarget import Imm32, Imm8, Imm7, Imm3 3 from .basetarget import Imm32, Imm8, Imm7, Imm3
4 from .arminstructions import allins, Reg8Op, ArmRegister 4 from .arminstructions import Add2, Sub, Add3, Cmp, Lsl, Orr
5 from .arminstructions import thumb_assembly_rules 5 from .arminstructions import Dcd, Pop, Push, Yield, Mov2, Mov3
6 from .arminstructions import B, Bl, Bne, Beq, Blt, Bgt
7 from .arminstructions import Ldr, Str2, Ldr2, Str1, Ldr1
6 8
7 from .armframe import ArmFrame 9 from .armframe import ArmFrame
8 from .arminstructionselector import ArmInstructionSelector 10 from .arminstructionselector import ArmInstructionSelector
11 from .armregisters import R0, R1, R2, R3, R4, R5, R6, R7, SP, LR, PC
12 from .armregisters import register_range
13
9 14
10 """ ARM target description. """ 15 """ ARM target description. """
11 16
12 # TODO: encode this in DSL (domain specific language) 17 # TODO: encode this in DSL (domain specific language)
13 # TBD: is this required? 18 # TBD: is this required?
14 # TODO: make a difference between armv7 and armv5? 19 # TODO: make a difference between armv7 and armv5?
15 20
21 thumb_assembly_rules = []
22 def add_rule(rhs, f):
23 thumb_assembly_rules.append(('instruction', rhs, f))
16 24
17 class ArmThumbTarget(Target): 25
26 class ThumbTarget(Target):
18 def __init__(self): 27 def __init__(self):
19 super().__init__('arm_thumb') 28 super().__init__('thumb')
20 for i in allins:
21 self.addInstruction(i)
22 # TODO: fix this nicer?
23 #setattr(self, i.__name__, i)
24 self.check()
25 self.ins_sel = ArmInstructionSelector() 29 self.ins_sel = ArmInstructionSelector()
26 self.FrameClass = ArmFrame 30 self.FrameClass = ArmFrame
27 self.assembler_rules = thumb_assembly_rules 31 self.add_rules()
32
33 def add_rules(self):
34
35 # Add instructions:
36 self.add_keyword('dcd')
37 self.add_instruction(['dcd', 'imm32'], lambda rhs: Dcd(rhs[1]))
38
39 self.add_keyword('mov')
40 self.add_instruction(['mov', 'reg8', ',', 'reg8'],
41 lambda rhs: Mov2(rhs[1], rhs[3]))
42
43 self.add_instruction(['mov', 'reg8', ',', 'imm8'],
44 lambda rhs: Mov3(rhs[1], rhs[3]))
45
46 self.add_keyword('add')
47 self.add_instruction(['add', 'reg8', ',', 'reg8', ',', 'imm3'],
48 lambda rhs: Add2(rhs[1], rhs[3], rhs[5]))
49
50 self.add_instruction(['add', 'reg8', ',', 'reg8', ',', 'reg8'],
51 lambda rhs: Add3(rhs[1], rhs[3], rhs[5]))
52
53 self.add_keyword('sub')
54 self.add_instruction(['sub', 'reg8', ',', 'reg8', ',', 'imm3'],
55 lambda rhs: Sub(rhs[1], rhs[3], rhs[5]))
56
57 self.add_instruction(['sub', 'sp', ',', 'sp', ',', 'imm8'],
58 lambda rhs: Sub(SP, SP, rhs[5]))
59
60 self.add_instruction(['add', 'sp', ',', 'sp', ',', 'imm8'],
61 lambda rhs: Sub(SP, SP, rhs[5]))
62
63 self.add_keyword('cmp')
64 self.add_instruction(['cmp', 'reg8', ',', 'reg8'],
65 lambda rhs: Cmp(rhs[1], rhs[3]))
66
67 self.add_keyword('lsl')
68 self.add_instruction(['lsl', 'reg8', ',', 'reg8'],
69 lambda rhs: Lsl(rhs[1], rhs[3]))
70
71 self.add_keyword('str')
72 self.add_instruction(['str', 'reg8', ',', '[', 'reg8', '+', 'imm5', ']'],
73 lambda rhs: Str2(rhs[1], rhs[4], rhs[6]))
74
75 self.add_keyword('ldr')
76 self.add_instruction(['ldr', 'reg8', ',', '[', 'reg8', '+', 'imm5', ']'],
77 lambda rhs: Ldr2(rhs[1], rhs[4], rhs[6]))
78
79 self.add_instruction(['str', 'reg8', ',', '[', 'sp', '+', 'imm8', ']'],
80 lambda rhs: Str1(rhs[1], rhs[6]))
81
82 self.add_instruction(['ldr', 'reg8', ',', '[', 'sp', '+', 'imm8', ']'],
83 lambda rhs: Ldr1(rhs[1], rhs[6]))
84
85 self.add_keyword('pop')
86 self.add_instruction(['pop', 'reg_list'], lambda rhs: Pop(rhs[1]))
87 self.add_keyword('push')
88 self.add_instruction(['push', 'reg_list'], lambda rhs: Push(rhs[1]))
89
90 self.add_keyword('yield')
91 self.add_instruction(['yield'], lambda rhs: Yield())
92
93 self.add_keyword('b')
94 self.add_keyword('bl')
95 self.add_instruction(['b', 'ID'], lambda rhs: B(rhs[1].val))
96 self.add_instruction(['bl', 'ID'], lambda rhs: Bl(rhs[1].val))
97 self.add_keyword('beq')
98 self.add_keyword('bne')
99 self.add_keyword('blt')
100 self.add_keyword('bgt')
101 self.add_instruction(['beq', 'ID'], lambda rhs: Beq(rhs[1].val))
102 self.add_instruction(['bne', 'ID'], lambda rhs: Bne(rhs[1].val))
103 self.add_instruction(['blt', 'ID'], lambda rhs: Blt(rhs[1].val))
104 self.add_instruction(['bgt', 'ID'], lambda rhs: Bgt(rhs[1].val))
105
106 self.add_keyword('align')
107 self.add_instruction(['align', 'imm8'], lambda rhs: Alignment(rhs[1]))
108
109 self.add_instruction(['ldr', 'reg8', ',', 'ID'],
110 lambda rhs: Ldr(rhs[1], rhs[3].val))
111
112 # Additional rules:
113
114 # Register list grammar:
115 self.add_rule('reg_list', ['{', 'reg_list_inner', '}'],
116 lambda rhs: rhs[1])
117 self.add_rule('reg_list_inner', ['reg_or_range'],
118 lambda rhs: rhs[0])
119 self.add_rule('reg_list_inner', ['reg_or_range', ',', 'reg_list_inner'],
120 lambda rhs: rhs[0] | rhs[2])
121 self.add_rule('reg_or_range', ['reg8'], lambda rhs: {rhs[0]})
122 self.add_rule('reg_or_range', ['lr'], lambda rhs: {LR})
123 self.add_rule('reg_or_range', ['pc'], lambda rhs: {PC})
124
125 self.add_rule('reg_or_range', ['reg8', '-', 'reg8'],
126 lambda rhs: register_range(rhs[0], rhs[2]))
127
128 self.add_keyword('r0')
129 self.add_keyword('r1')
130 self.add_keyword('r2')
131 self.add_keyword('r3')
132 self.add_keyword('r4')
133 self.add_keyword('r5')
134 self.add_keyword('r6')
135 self.add_keyword('r7')
136 self.add_keyword('sp')
137 self.add_keyword('lr')
138 self.add_keyword('pc')
139 self.add_rule('reg8', ['r0'], lambda rhs: R0)
140 self.add_rule('reg8', ['r1'], lambda rhs: R1)
141 self.add_rule('reg8', ['r2'], lambda rhs: R2)
142 self.add_rule('reg8', ['r3'], lambda rhs: R3)
143 self.add_rule('reg8', ['r4'], lambda rhs: R4)
144 self.add_rule('reg8', ['r5'], lambda rhs: R5)
145 self.add_rule('reg8', ['r6'], lambda rhs: R6)
146 self.add_rule('reg8', ['r7'], lambda rhs: R7)
147 # Constants:
148 self.add_rule('imm32', ['val32'], lambda x: x[0].val)
149 self.add_rule('imm32', ['imm8'], lambda x: x[0])
150 self.add_rule('imm8', ['val8'], lambda x: x[0].val)
151 self.add_rule('imm8', ['imm5'], lambda x: x[0])
152 self.add_rule('imm5', ['val5'], lambda x: x[0].val)
153 self.add_rule('imm5', ['imm3'], lambda x: x[0])
154 self.add_rule('imm3', ['val3'], lambda x: x[0].val)
155
28 156
29 157
30 class ArmArmTarget(Target): 158 class ArmArmTarget(Target):
31 def __init__(self): 159 def __init__(self):
32 super().__init__('arm_arm') 160 super().__init__('arm_arm')
33 161
162 # Assembly grammar:
163 self.add_keyword('mov')
164 self.add_keyword('r0')
165 self.add_keyword('r1')
166 self.add_keyword('r2')
167 self.add_keyword('r3')
168 self.add_keyword('r4')
169 self.add_keyword('r5')
170
171 self.add_rule('reg', ['r0'], lambda rhs: R0)
172 self.add_rule('reg', ['r1'], lambda rhs: R1)
173 self.add_rule('reg', ['r2'], lambda rhs: R2)
174 self.add_rule('reg', ['r3'], lambda rhs: R3)
175 self.add_rule('reg', ['r4'], lambda rhs: R4)
176 self.add_rule('reg', ['r5'], lambda rhs: R5)
177
178
179 self.add_instruction(['mov', 'reg', ',', 'imm8'],
180 lambda rhs: Yield())
181
182 self.add_rule('imm32', ['val32'], lambda x: x[0].val)
183 self.add_rule('imm32', ['imm8'], lambda x: x[0])
184 self.add_rule('imm8', ['val8'], lambda x: x[0].val)
185 self.add_rule('imm8', ['imm5'], lambda x: x[0])
186 self.add_rule('imm5', ['val5'], lambda x: x[0].val)
187 self.add_rule('imm5', ['imm3'], lambda x: x[0])
188 self.add_rule('imm3', ['val3'], lambda x: x[0].val)