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comparison python/ppci/target/arm/arm.brg @ 346:3bb7dcfe5529

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expanded arm target
author Windel Bouwman
date Fri, 07 Mar 2014 17:05:32 +0100
parents
children 899ae3aea803
comparison
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345:b4882ff0ed06 346:3bb7dcfe5529
1
2 from ppci.target.arm.instructions import Add1, Sub1, Ldr1, Ldr3
3
4 %%
5
6 %terminal ADDI32 SUBI32 MULI32
7 %terminal ORI32 SHLI32
8 %terminal CONSTI32 MEMI32 REGI32 CALL
9 %terminal MOVI32
10
11 %%
12
13 reg: ADDI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Add1, dst=[d], src=[$1, $2]); return d .)
14 reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub1, dst=[d], src=[$1, $2]); return d .)
15 reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub1, dst=[d], src=[$1, $2]); return d .)
16 reg: MEMI32(ADDI32(reg, cn)) 2 (. d = self.newTmp(); self.emit(Ldr1, dst=[d], src=[$1], others=[$2]); return d .)
17
18
19 cn: CONSTI32 0 (. return $$.value .)
20
21 reg: CONSTI32 3 (. d = self.newTmp(); ln = self.selector.frame.addConstant($$.value); self.emit(Ldr3, dst=[d], others=[ln]); return d .)
22 reg: REGI32 1 (. return $$.value .)