Mercurial > lcfOS
comparison python/codegenarm.py @ 219:1fa3e0050b49
Expanded ad hoc code generator
author | Windel Bouwman |
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date | Sat, 06 Jul 2013 12:38:09 +0200 |
parents | 494828a7adf1 |
children | c3f1ce8b638f |
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218:494828a7adf1 | 219:1fa3e0050b49 |
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2 from asmnodes import ALabel | 2 from asmnodes import ALabel |
3 import cortexm3 as arm | 3 import cortexm3 as arm |
4 from ppci import CompilerError | 4 from ppci import CompilerError |
5 | 5 |
6 class ArmCodeGenerator: | 6 class ArmCodeGenerator: |
7 """ Simple code generator """ | 7 """ |
8 Simple code generator | |
9 Ad hoc implementation | |
10 """ | |
8 def __init__(self, out): | 11 def __init__(self, out): |
9 self.outs = out | 12 self.outs = out |
10 | 13 |
11 def emit(self, item): | 14 def emit(self, item): |
12 self.outs.emit(item) | 15 self.outs.emit(item) |
19 for gvar in ircode.Variables: | 22 for gvar in ircode.Variables: |
20 self.emit(ALabel(gvar.name)) | 23 self.emit(ALabel(gvar.name)) |
21 # TODO: use initial value: | 24 # TODO: use initial value: |
22 self.emit(arm.dcd_ins(0)) | 25 self.emit(arm.dcd_ins(0)) |
23 | 26 |
27 self.imms = [] # list with immediates relative to PC. | |
24 self.outs.selectSection('code') | 28 self.outs.selectSection('code') |
25 for f in ircode.Functions: | 29 for f in ircode.Functions: |
30 # Add global variable addresses to immediate list: | |
31 for gvar in ircode.Variables: | |
32 pass #self.imms.append(( | |
33 | |
34 self.stack_frame = [] | |
26 self.emit(ALabel(f.name)) | 35 self.emit(ALabel(f.name)) |
27 # Save some registers: | 36 # Save some registers: |
28 self.emit(arm.push_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6,arm.r7,arm.lr}))) | 37 self.emit(arm.push_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6,arm.r7,arm.lr}))) |
29 for bb in f.BasicBlocks: | 38 for bb in f.BasicBlocks: |
30 self.emit(ALabel(bb.name)) | 39 self.emit(ALabel(bb.name)) |
31 for ins in bb.Instructions: | 40 for ins in bb.Instructions: |
32 self.generateInstruction(ins) | 41 self.generateInstruction(ins) |
33 | 42 |
43 self.outs.align(4) | |
44 while self.imms: | |
45 l, v = self.imms.pop() | |
46 self.emit(ALabel(l)) | |
47 self.emit(arm.dcd_ins(v)) | |
48 self.outs.align(4) | |
49 | |
50 def getStack(self, v): | |
51 off = self.stack_frame.index(v) | |
52 return off * 4 | |
53 def addStack(self, v): | |
54 self.stack_frame.append(v) | |
55 return self.getStack(v) | |
56 def getGlobal(self, r, g): | |
57 _global_address = g.name + '__global' | |
58 self.emit(arm.ldr_pcrel(r, ALabel(_global_address))) | |
59 | |
34 def generateInstruction(self, ins): | 60 def generateInstruction(self, ins): |
35 if type(ins) is ir.Branch: | 61 if type(ins) is ir.Branch: |
36 self.emit(arm.jmp_ins(ins.target)) | 62 tgt = ALabel(ins.target.name) |
37 elif type(ins) is ir.ImmLoad and ins.value < 255: | 63 self.emit(arm.jmp_ins(tgt)) |
38 self.emit(arm.mov_ins(arm.r0, arm.Imm8(ins.value))) | 64 elif type(ins) is ir.ImmLoad: |
39 # determine stack frame.. | 65 lname = ins.target.name + '_ivalue' |
40 self.emit(arm.mov_ins(arm.r1, arm.Imm8(9))) | 66 self.emit(arm.ldr_pcrel(arm.r0, ALabel(lname))) |
41 #self.emit(arm. | 67 self.imms.append((lname, ins.value)) |
42 elif type(ins) is ir.ImmLoad and ins.value < (2**32): | 68 self.emit(arm.str_sprel(arm.r0, self.addStack(ins.target))) |
43 print(ins) | |
44 elif type(ins) is ir.Store: | 69 elif type(ins) is ir.Store: |
45 print(ins) | 70 # Load value in r0: |
71 self.emit(arm.ldr_sprel(arm.r0, self.getStack(ins.value))) | |
72 # store in memory: | |
73 self.getGlobal(arm.r1, ins.location) | |
74 self.emit(arm.storeimm5_ins(arm.r0, arm.MemoryOp(arm.r1, 0))) | |
75 elif type(ins) is ir.Load: | |
76 self.getGlobal(arm.r0, ins.location) | |
77 self.emit(arm.loadimm5_ins(arm.r0, arm.MemoryOp(arm.r0, 0))) | |
78 # Store value on stack: | |
79 self.emit(arm.str_sprel(arm.r0, self.addStack(ins.value))) | |
80 elif type(ins) is ir.BinaryOperator: | |
81 # Load operands: | |
82 self.emit(arm.ldr_sprel(arm.r0, self.getStack(ins.value1))) | |
83 self.emit(arm.ldr_sprel(arm.r1, self.getStack(ins.value2))) | |
84 # do operation: | |
85 if ins.operation == '+': | |
86 self.emit(arm.addregs_ins(arm.r0, arm.r0, arm.r1)) | |
87 else: | |
88 print('operation not implemented', ins.operation) | |
89 # Store value back: | |
90 self.emit(arm.str_sprel(arm.r0, self.addStack(ins.result))) | |
46 elif type(ins) is ir.Return: | 91 elif type(ins) is ir.Return: |
47 self.emit(arm.pop_ins(arm.RegisterSet({arm.r5, arm.r6, arm.pc}))) | 92 self.emit(arm.pop_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6, arm.r7, arm.pc}))) |
48 elif type(ins) is ir.Load: | |
49 print(ins) | |
50 elif type(ins) is ir.BinaryOperator: | |
51 print(ins) | |
52 elif type(ins) is ir.ConditionalBranch: | 93 elif type(ins) is ir.ConditionalBranch: |
53 print(ins) | 94 self.emit(arm.ldr_sprel(arm.r0, self.getStack(ins.a))) |
95 self.emit(arm.ldr_sprel(arm.r1, self.getStack(ins.b))) | |
54 self.emit(arm.cmp_ins(arm.r1, arm.r0)) | 96 self.emit(arm.cmp_ins(arm.r1, arm.r0)) |
97 tgt_yes = ALabel(ins.lab1.name) | |
98 if ins.cond == '==': | |
99 self.emit(arm.beq_ins(tgt_yes)) | |
100 else: | |
101 print('TODO', ins.cond) | |
102 tgt_no = ALabel(ins.lab2.name) | |
103 self.emit(arm.jmp_ins(tgt_no)) | |
55 else: | 104 else: |
56 raise CompilerError('IR "{}" not covered'.format(ins)) | 105 raise CompilerError('IR "{}" not covered'.format(ins)) |
57 | 106 |
58 | 107 |