comparison ide/compiler/codegenerator.py @ 4:0d5ef85b8698

Improved link between ast viewer and code edit
author windel-eee
date Wed, 21 Sep 2011 19:05:18 +0200
parents 92df07bc2081
children 818f80afa78b
comparison
equal deleted inserted replaced
3:77202b0e0f40 4:0d5ef85b8698
403 self.fixCode(fixloc1, imm32(rip3 - rip2)) # Fixup jump out of while loop 403 self.fixCode(fixloc1, imm32(rip3 - rip2)) # Fixup jump out of while loop
404 404
405 elif type(node) is ForStatement: 405 elif type(node) is ForStatement:
406 # Initial load of iterator variable: 406 # Initial load of iterator variable:
407 self.genexprcode(node.begin) 407 self.genexprcode(node.begin)
408 self.storeRegInDesignator(node.begin.reg, node.variable) 408 self.genexprcode(node.end)
409 self.freereg(node.begin) 409 # TODO: link reg with variable so that a register is used instead of a variable
410 iterreg = node.begin.reg # Get the register used for the loop
411 #self.addCode(cmpreg64(iterreg, node.endvalue))
410 rip1 = self.rip 412 rip1 = self.rip
411 self.gencode(node.statements) 413 self.gencode(node.statements)
412 #self.loadDesignatorInReg(node. 414 #self.loadDesignatorInReg(node.
413 #self.addCode( addreg64(node.variable, node.increment) ) 415 #self.addCode( addreg64(node.variable, node.increment) )
416 self.addCode(nearjump(0x0))
417 fixloc1 = self.rip - 4
418 rip2 = self.rip
419 self.fixCode(fixloc1, imm32(rip1 - rip2))
420
421 self.freereg(node.begin) # Release register used in loop
422 self.freereg(node.end)
414 Error('No implementation of FOR statement') 423 Error('No implementation of FOR statement')
415 424
416 elif type(node) is AsmCode: 425 elif type(node) is AsmCode:
417 def processOperand(op): 426 def processOperand(op):
418 if type(op) is list: 427 if type(op) is list: