annotate doc/compiler.rst @ 307:e609d5296ee9

Massive rewrite of codegenerator
author Windel Bouwman
date Thu, 12 Dec 2013 20:42:56 +0100
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children 2e7f55319858
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3 Compiler
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4 ========
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5
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6 This chapter describes the design of the compiler.
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7 The compiler consists a frontend, mid-end and back-end. The frontend deals with
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8 source file parsing and semantics checking. The mid-end performs optimizations.
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9 This is optional. The back-end generates machine code. The front-end produces
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10 intermediate code. This is a simple representation of the source. The back-end
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11 can accept this kind of representation.
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13 .. graphviz::
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14
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15 digraph x {
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16 rankdir="LR"
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17 1 [label="c3 source file"]
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18 10 [label="c3 front end" ]
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19 11 [label="language X front end" ]
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20 20 [label="mid end" ]
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21 30 [label="back end for X86" ]
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22 31 [label="back end for ARM" ]
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23 40 [label="object file"]
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24 1 -> 10
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25 10 -> 20 [label="IR-code"]
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26 11 -> 20 [label="IR-code"]
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27 20 -> 30 [label="IR-code"]
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28 20 -> 31 [label="IR-code"]
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29 30 -> 40
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30 }
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33 IR-code
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34 -------
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36 The intermediate representation (IR) of a program de-couples the front end
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37 from the backend of the compiler.
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39 See ir for details about all the available instructions.
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41
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42 C3 Front-end
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43 ------------
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45 For the front-end a recursive descent parser is created for the c3 language.
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46 This is a subset of the C language with some additional features.
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47
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48 .. graphviz::
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49
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50 digraph c3 {
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51 rankdir="LR"
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52 1 [label="source text"]
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53 10 [label="lexer" ]
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54 20 [label="parser" ]
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55 30 [label="semantic checks" ]
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56 40 [label="code generation"]
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57 99 [label="IR-code object"]
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58 1 -> 10
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59 10 -> 20
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60 20 -> 30
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61 30 -> 40 [label="AST tree"]
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62 40 -> 99
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63 }
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65 .. autoclass:: ppci.c3.Lexer
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67 .. autoclass:: ppci.c3.Parser
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69 .. autoclass:: ppci.c3.Analyzer
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70
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71 .. autoclass:: ppci.c3.TypeChecker
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72
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73 .. autoclass:: ppci.c3.CodeGenerator
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75 .. autoclass:: ppci.c3.Builder
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77 Back-end
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78 --------
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79
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80 The back-end is more complicated. There are several steps to be taken here.
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81
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82 1. Instruction selection
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83 2. register allocation
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84 3. Peep hole optimization?
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85 4. real code generation
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86
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87 .. automodule:: ppci.codegen
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88 :members:
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89
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90 Instruction selection
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91 ~~~~~~~~~~~~~~~~~~~~~
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92
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93 The instruction selection phase takes care of scheduling and instruction
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94 selection. The output of this phase is a one frame per function with a flat
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95 list of abstract machine instructions.
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96
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97 // .. autoclass:: ppci.irmach.Frame
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99 // .. autoclass:: ppci.irmach.AbstractInstruction
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