annotate python/ppci/ir.py @ 409:8fe299cd2d55 devel

Close devel branch
author Windel Bouwman
date Sat, 21 Feb 2015 12:20:10 +0100
parents d1ecc493384e
children 5477e499b039
rev   line source
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
1 """
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
2 Intermediate representation (IR) code classes.
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
3 """
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
4
310
e95e5572cd6d Added utils doc page
Windel Bouwman
parents: 309
diff changeset
5
336
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
6 def label_name(dut):
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
7 """ Function that returns the assembly code label name """
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
8 if isinstance(dut, Block):
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
9 f = dut.function
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
10 return label_name(f) + '_' + dut.name
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
11 elif isinstance(dut, Function):
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
12 return label_name(dut.module) + '_' + dut.name
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
13 elif isinstance(dut, Module):
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
14 return dut.name
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
15 else:
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
16 raise NotImplementedError(str(dut))
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
17
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
18
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
19 class Module:
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
20 """ Container unit for variables and functions. """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
21 def __init__(self, name):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
22 self.name = name
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
23 self.functions = []
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
24 self.variables = []
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
25
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
26 def __repr__(self):
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
27 return 'module {0}'.format(self.name)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
28
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
29 def add_function(self, f):
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
30 """ Add a function to this module """
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
31 self.functions.append(f)
336
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
32 f.module = self
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
33
336
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
34 def add_variable(self, v):
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
35 self.variables.append(v)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
36
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
37 def getVariables(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
38 return self.variables
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
39
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
40 Variables = property(getVariables)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
41
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
42 def getFunctions(self):
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
43 return self.functions
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
44
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
45 Functions = property(getFunctions)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
46
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
47 def findFunction(self, name):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
48 for f in self.funcs:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
49 if f.name == name:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
50 return f
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
51 raise KeyError(name)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
52
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
53 getFunction = findFunction
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
54
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
55
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
56 class Function:
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
57 """ Represents a function. """
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
58 def __init__(self, name, module=None):
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
59 self.name = name
336
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
60 self.entry = Block('entry')
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
61 self.entry.function = self
336
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
62 self.epiloog = Block('epilog')
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
63 self.epiloog.function = self
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
64 self.epiloog.addInstruction(Terminator())
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
65 self.return_value = Temp('{}_retval'.format(name))
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
66 self.arguments = []
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
67 self.localvars = []
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
68 if module:
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
69 module.add_function(self)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
70
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
71 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
72 args = ','.join(str(a) for a in self.arguments)
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
73 return 'function i32 {}({})'.format(self.name, args)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
74
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
75 def add_block(self, bb):
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
76 #self.bbs.append(bb)
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
77 bb.function = self
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
78
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
79 def removeBlock(self, bb):
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
80 #self.bbs.remove(bb)
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
81 bb.function = None
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
82
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
83 def getBlocks(self):
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
84 bbs = [self.entry]
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
85 worklist = [self.entry]
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
86 while worklist:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
87 b = worklist.pop()
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
88 for sb in b.Successors:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
89 if sb not in bbs:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
90 bbs.append(sb)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
91 worklist.append(sb)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
92 bbs.remove(self.entry)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
93 if self.epiloog in bbs:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
94 bbs.remove(self.epiloog)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
95 bbs.insert(0, self.entry)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
96 bbs.append(self.epiloog)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
97 return bbs
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
98
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
99 def findBasicBlock(self, name):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
100 for bb in self.bbs:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
101 if bb.name == name:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
102 return bb
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
103 raise KeyError(name)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
104
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
105 Blocks = property(getBlocks)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
106
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
107 @property
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
108 def Entry(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
109 return self.entry
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
110
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
111 def check(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
112 for b in self.Blocks:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
113 b.check()
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
114
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
115 def addParameter(self, p):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
116 assert type(p) is Parameter
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
117 p.num = len(self.arguments)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
118 self.arguments.append(p)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
119
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
120 def addLocal(self, l):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
121 assert type(l) is LocalVariable
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
122 self.localvars.append(l)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
123
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
124
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
125 class Block:
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
126 """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
127 Uninterrupted sequence of instructions with a label at the start.
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
128 """
317
e30a77ae359b Added glue blocks
Windel Bouwman
parents: 312
diff changeset
129 def __init__(self, name, function=None):
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
130 self.name = name
317
e30a77ae359b Added glue blocks
Windel Bouwman
parents: 312
diff changeset
131 self.function = function
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
132 self.instructions = []
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
133
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
134 parent = property(lambda s: s.function)
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
135
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
136 def __repr__(self):
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
137 return '{0}:'.format(self.name)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
138
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
139 def addInstruction(self, i):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
140 i.parent = self
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
141 assert not isinstance(self.LastInstruction, LastStatement)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
142 self.instructions.append(i)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
143
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
144 def replaceInstruction(self, i1, i2):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
145 idx = self.instructions.index(i1)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
146 i1.parent = None
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
147 i1.delete()
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
148 i2.parent = self
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
149 self.instructions[idx] = i2
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
150
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
151 def removeInstruction(self, i):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
152 i.parent = None
317
e30a77ae359b Added glue blocks
Windel Bouwman
parents: 312
diff changeset
153 #i.delete()
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
154 self.instructions.remove(i)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
155
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
156 @property
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
157 def Instructions(self):
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
158 return self.instructions
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
159
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
160 @property
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
161 def LastInstruction(self):
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
162 if not self.Empty:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
163 return self.instructions[-1]
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
164
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
165 @property
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
166 def Empty(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
167 return len(self.instructions) == 0
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
168
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
169 @property
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
170 def FirstInstruction(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
171 return self.instructions[0]
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
172
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
173 def getSuccessors(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
174 if not self.Empty:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
175 return self.LastInstruction.Targets
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
176 return []
312
2c9768114877 Added cool logging formatter
Windel Bouwman
parents: 310
diff changeset
177
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
178 Successors = property(getSuccessors)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
179
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
180 def getPredecessors(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
181 preds = []
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
182 for bb in self.parent.Blocks:
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
183 if self in bb.Successors:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
184 preds.append(bb)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
185 return preds
312
2c9768114877 Added cool logging formatter
Windel Bouwman
parents: 310
diff changeset
186
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
187 Predecessors = property(getPredecessors)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
188
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
189 def precedes(self, other):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
190 raise NotImplementedError()
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
191
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
192
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
193 # Instructions:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
194
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
195 class Expression:
304
fa99f36fabb5 Fix docs
Windel Bouwman
parents: 303
diff changeset
196 """ Base class for an expression """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
197 pass
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
198
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
199
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
200 class Const(Expression):
304
fa99f36fabb5 Fix docs
Windel Bouwman
parents: 303
diff changeset
201 """ Represents a constant value """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
202 def __init__(self, value):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
203 self.value = value
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
204
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
205 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
206 return 'Const {}'.format(self.value)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
207
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
208
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
209 class Call(Expression):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
210 """ Call a function with some arguments """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
211 def __init__(self, f, arguments):
336
d1ecc493384e Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents: 317
diff changeset
212 assert type(f) is str
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
213 self.f = f
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
214 self.arguments = arguments
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
215
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
216 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
217 args = ', '.join([str(arg) for arg in self.arguments])
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
218 return '{}({})'.format(self.f, args)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
219
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
220
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
221 # Data operations
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
222 class Binop(Expression):
304
fa99f36fabb5 Fix docs
Windel Bouwman
parents: 303
diff changeset
223 """ Generic binary operation """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
224 ops = ['+', '-', '*', '/', '|', '&', '<<', '>>']
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
225
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
226 def __init__(self, value1, operation, value2):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
227 assert operation in Binop.ops
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
228 self.a = value1
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
229 self.b = value2
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
230 self.operation = operation
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
231
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
232 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
233 a, b = self.a, self.b
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
234 return '({} {} {})'.format(a, self.operation, b)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
235
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
236
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
237 def Add(a, b):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
238 """ Add a and b """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
239 return Binop(a, '+', b)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
240
292
534b94b40aa8 Fixup reorganize
Windel Bouwman
parents: 280
diff changeset
241
279
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
242 def Sub(a, b):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
243 """ Substract b from a """
279
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
244 return Binop(a, '-', b)
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
245
292
534b94b40aa8 Fixup reorganize
Windel Bouwman
parents: 280
diff changeset
246
279
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
247 def Mul(a, b):
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
248 """ Multiply a by b """
279
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
249 return Binop(a, '*', b)
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
250
292
534b94b40aa8 Fixup reorganize
Windel Bouwman
parents: 280
diff changeset
251
279
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
252 def Div(a, b):
309
68b01c8abf8a Added start of ir read and write
Windel Bouwman
parents: 307
diff changeset
253 """ Divide a in b pieces """
279
2ccd57b1d78c Fix register allocator to do burn2 OK
Windel Bouwman
parents: 277
diff changeset
254 return Binop(a, '/', b)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
255
303
be7f60545368 Final fixups
Windel Bouwman
parents: 301
diff changeset
256
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
257 class Eseq(Expression):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
258 """ Sequence of instructions where the last is an expression """
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
259 def __init__(self, stmt, e):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
260 self.stmt = stmt
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
261 self.e = e
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
262
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
263 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
264 return '({}, {})'.format(self.stmt, self.e)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
265
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
266
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
267 class Alloc(Expression):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
268 """ Allocates space on the stack """
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
269 def __init__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
270 super().__init__()
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
271
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
272 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
273 return 'Alloc'
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
274
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
275
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
276 class Variable(Expression):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
277 def __init__(self, name):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
278 self.name = name
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
279
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
280 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
281 return 'Var {}'.format(self.name)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
282
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
283
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
284 class LocalVariable(Variable):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
285 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
286 return 'Local {}'.format(self.name)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
287
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
288
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
289 class Parameter(Variable):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
290 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
291 return 'Param {}'.format(self.name)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
292
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
293
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
294 class Temp(Expression):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
295 """ Temporary storage, same as register """
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
296 def __init__(self, name):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
297 self.name = name
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
298
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
299 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
300 return 'TMP_{}'.format(self.name)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
301
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
302
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
303 class Mem(Expression):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
304 """ Memory access """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
305 def __init__(self, e):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
306 self.e = e
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
307
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
308 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
309 return '[{}]'.format(self.e)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
310
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
311
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
312 class Statement:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
313 """ Base class for all instructions. """
312
2c9768114877 Added cool logging formatter
Windel Bouwman
parents: 310
diff changeset
314 @property
2c9768114877 Added cool logging formatter
Windel Bouwman
parents: 310
diff changeset
315 def IsTerminator(self):
2c9768114877 Added cool logging formatter
Windel Bouwman
parents: 310
diff changeset
316 return isinstance(self, LastStatement)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
317
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
318
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
319 class Move(Statement):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
320 """ Move source to destination """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
321 def __init__(self, dst, src):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
322 self.dst = dst
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
323 self.src = src
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
324
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
325 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
326 return '{} = {}'.format(self.dst, self.src)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
327
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
328
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
329 class Exp(Statement):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
330 def __init__(self, e):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
331 self.e = e
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
332
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
333 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
334 return '{}'.format(self.e)
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
335
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
336
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
337 # Branching:
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
338 class LastStatement(Statement):
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
339 def changeTarget(self, old, new):
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
340 idx = self.Targets.index(old)
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
341 self.Targets[idx] = new
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
342
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
343
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
344 class Terminator(LastStatement):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
345 """ Instruction that terminates the terminal block """
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
346 def __init__(self):
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
347 self.Targets = []
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
348
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
349 def __repr__(self):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
350 return 'Terminator'
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
351
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
352
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
353 class Jump(LastStatement):
304
fa99f36fabb5 Fix docs
Windel Bouwman
parents: 303
diff changeset
354 """ Jump statement to some target location """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
355 def __init__(self, target):
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
356 self.Targets = [target]
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
357
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
358 def setTarget(self, t):
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
359 self.Targets[0] = t
310
e95e5572cd6d Added utils doc page
Windel Bouwman
parents: 309
diff changeset
360
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
361 target = property(lambda s: s.Targets[0], setTarget)
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
362
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
363 def __repr__(self):
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
364 return 'JUMP {}'.format(self.target.name)
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
365
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
366
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
367 class CJump(LastStatement):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
368 """ Conditional jump to true or false labels. """
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
369 conditions = ['==', '<', '>', '>=', '<=', '!=']
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
370
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
371 def __init__(self, a, cond, b, lab_yes, lab_no):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
372 assert cond in CJump.conditions
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
373 self.a = a
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
374 self.cond = cond
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
375 self.b = b
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
376 self.Targets = [lab_yes, lab_no]
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
377
280
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
378 lab_yes = property(lambda s: s.Targets[0])
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
379 lab_no = property(lambda s: s.Targets[1])
02385f62f250 Rework from str interface to Instruction interface
Windel Bouwman
parents: 279
diff changeset
380
277
046017431c6a Started register allocator
Windel Bouwman
parents:
diff changeset
381 def __repr__(self):
305
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
382 return 'IF {} {} {} THEN {} ELSE {}'\
0615b5308710 Updated docs
Windel Bouwman
parents: 304
diff changeset
383 .format(self.a, self.cond, self.b, self.lab_yes, self.lab_no)