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1 import struct, types
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202
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2 from target import Register, Instruction, Target
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3 from asmnodes import ASymbol, ANumber
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4 from ppci import CompilerError
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5 import ir
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6
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7 def u16(h):
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8 return struct.pack('<H', h)
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9
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10 def u32(x):
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11 return struct.pack('<I', x)
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12
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13 armtarget = Target('arm')
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14
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15 class ArmReg(Register):
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16 def __init__(self, num, name):
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17 super().__init__(name)
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18 self.num = num
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19
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20 class ArmImm:
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21 def __init__(self, i):
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22 self.i = i
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23
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203
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24 class RegOp:
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25 def __init__(self, num):
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26 assert num < 8
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27 self.num = num
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28
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29 @classmethod
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30 def Create(cls, vop):
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31 if type(vop) is ASymbol:
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32 name = vop.name
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33 regs = {}
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34 for r in armtarget.registers:
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35 regs[r.name] = r
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36 if name in regs:
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37 r = regs[name]
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38 return cls(r.num)
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39
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40 class Label:
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41 def __init__(self, name):
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42 self.name = name
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43
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44 @classmethod
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45 def Create(cls, vop):
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46 if type(vop) is ASymbol:
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47 name = vop.name
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48 return cls(name)
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49
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203
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50 class Imm8:
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51 def __init__(self, imm):
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52 assert imm < 256
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53 self.imm = imm
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54
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55 @classmethod
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56 def Create(cls, vop):
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57 if type(vop) is ANumber and vop.number < 256:
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58 return cls(vop.number)
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59
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60 class Imm3:
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61 def __init__(self, imm):
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62 assert imm < 8
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63 assert type(imm) is int
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64 self.imm = imm
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65
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66 @classmethod
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67 def Create(cls, vop):
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68 if type(vop) is ANumber and vop.number < 8:
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69 return cls(vop.number)
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70
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71 class RegisterSet:
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72 def __init__(self, regs):
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73 pass
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74
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75 # 8 bit registers:
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76 r0 = ArmReg(0, 'r0')
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77 armtarget.registers.append(r0)
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78 r4 = ArmReg(4, 'r4')
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79 armtarget.registers.append(r4)
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80 r5 = ArmReg(5, 'r5')
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81 armtarget.registers.append(r5)
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82 r6 = ArmReg(6, 'r6')
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83 armtarget.registers.append(r6)
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84 r7 = ArmReg(7, 'r7')
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85 armtarget.registers.append(r7)
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86
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87 class ArmInstruction(Instruction):
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88 pass
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89
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90 @armtarget.instruction
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91 class ldr_ins(ArmInstruction):
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92 mnemonic = 'ldr'
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93 opcode = 1337
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94 irpattern = 'todo'
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95
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96 @armtarget.instruction
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97 class dcd_ins(ArmInstruction):
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98 mnemonic = 'dcd'
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99 def __init__(self, expr):
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100 self.expr = expr
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101 def encode(self):
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102 return u32(self.expr)
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103
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104 class Operand2:
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105 def __init__(self, expr):
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106 if type(expr) is ANumber:
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107 pass
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108 pass
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109
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110 @armtarget.instruction
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111 class mov_ins(ArmInstruction):
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112 """ mov Rd, imm8, move immediate value into register """
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113 mnemonic = 'mov'
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114 opcode = 4 # 00100 Rd(3) imm8
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115 operands = (RegOp, Imm8)
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116 irpattern = ir.ImmLoad
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117 def __init__(self, rd, imm):
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118 self.imm = imm.imm
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119 self.r = rd.num
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120
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121 @classmethod
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122 def FromIr(cls, ir_ins):
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123 pass
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124
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125 def encode(self):
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126 rd = self.r
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127 opcode = self.opcode
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128 imm8 = self.imm
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129 h = (opcode << 11) | (rd << 8) | imm8
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130 return u16(h)
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131
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132 @armtarget.instruction
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133 class movregreg_ins(ArmInstruction):
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134 """ mov Rd, Rm """
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135 mnemonic = 'mov'
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136 opcode = 8 # 01000 Rd(3) imm8
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137 operands = (RegOp, RegOp)
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138 def __init__(self, rd, rm):
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139 self.rd = rd
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140 self.rm = rm
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141 def encode(self):
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142 rd = self.rd.num
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143 D = (rd & 0x8) >> 3
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144 assert D < 2
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145 rd = rd & 0x7
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146 rm = self.rm.num
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147 assert rm < 16
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148 opcode = self.opcode
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149 h = (opcode << 11) | (3 << 9) | (D << 7) | (rm << 3) | rd
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150 return u16(h)
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151
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152 @armtarget.instruction
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153 class addregregimm3_ins(ArmInstruction):
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154 """ add Rd, Rn, imm3 """
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155 mnemonic = 'add'
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156 opcode = 3 # 00011
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157 operands = (RegOp, RegOp, Imm3)
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158 irpattern = 3
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159 def __init__(self, rd, rn, imm3):
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160 self.rd = rd
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161 self.rn = rn
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162 self.imm3 = imm3
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163 def encode(self):
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164 rd = self.rd.num
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165 rn = self.rn.num
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166 imm3 = self.imm3.imm
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167 opcode = self.opcode
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168 h = (opcode << 11) | (1 << 10) | (imm3 << 6) | (rn << 3) | rd
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169 return u16(h)
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170
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171 @armtarget.instruction
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172 class cmpregimm8_ins(ArmInstruction):
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173 """ cmp Rn, imm8 """
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174 mnemonic = 'cmp'
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175 opcode = 5 # 00101
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176 operands = (RegOp, Imm8)
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177 def __init__(self, rn, imm):
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178 self.rn = rn
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179 self.imm = imm
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180 def encode(self):
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181 rn = self.rn.num
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182 imm = self.imm.imm
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183 opcode = self.opcode
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184 h = (opcode << 11) | (rn << 8) | imm
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185 return u16(h)
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186
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187 @armtarget.instruction
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188 class jmp_ins(ArmInstruction):
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189 operands = (Label)
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190 mnemonic = 'jmp'
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191 def __init__(self, target_label):
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192 self.target = target_label
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193 def fixUp(self):
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194 pass
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195 def encode(self):
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196 h = 1337 # TODO
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197 return u16(h)
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198
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199 @armtarget.instruction
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200 class push_ins(ArmInstruction):
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201 operands = (RegisterSet)
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202 mnemonic = 'push'
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203 def __init__(self, regs):
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204 self.regs = regs
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205 def encode(self):
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206 return u16(0)
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207
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208 @armtarget.instruction
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209 class pop_ins(ArmInstruction):
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210 operands = (RegisterSet)
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211 mnemonic = 'pop'
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212 def __init__(self, regs):
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213 self.regs = regs
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214 def encode(self):
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215 return u16(0)
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216
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217 @armtarget.instruction
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218 class yield_ins(ArmInstruction):
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219 operands = ()
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220 mnemonic = 'yield'
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221 def encode(self):
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222 return u16(0xbf10)
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223
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