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1
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2
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3 Compiler
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4 ========
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5
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6 This chapter describes the design of the compiler.
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7
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8
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9 Overview
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10 --------
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11
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12 The compiler consists a frontend, mid-end and back-end. The frontend deals with
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13 source file parsing and semantics checking. The mid-end performs optimizations.
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14 This is optional. The back-end generates machine code. The front-end produces
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15 intermediate code. This is a simple representation of the source. The back-end
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16 can accept this kind of representation. This way the compiler is portable and
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17 a front end can be constructed without having to do the rest.
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18
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19 .. graphviz::
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20
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21 digraph x {
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22 rankdir="LR"
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23 1 [label="c3 source file"]
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24 10 [label="c3 front end" ]
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25 11 [label="language X front end" ]
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26 20 [label="mid end" ]
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27 30 [label="back end for X86" ]
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28 31 [label="back end for ARM" ]
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29 40 [label="object file"]
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30 1 -> 10
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31 10 -> 20 [label="IR-code"]
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32 11 -> 20 [label="IR-code"]
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33 20 -> 30 [label="IR-code"]
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34 20 -> 31 [label="IR-code"]
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35 30 -> 40
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36 }
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37
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38 IR-code
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39 -------
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40 The IR-code is implemented in the ir package.
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41
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42 .. autoclass:: ir.Module
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43
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44 .. autoclass:: ir.Function
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45
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46 .. autoclass:: ir.Block
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47
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48 .. autoclass:: ir.Statement
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49
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50 .. autoclass:: ir.Expression
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51
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52 .. # .. inheritance-diagram:: ir.Statement
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53
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274
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54 C3 Front-end
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55 ------------
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273
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56
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57 For the front-end a recursive descent parser is created for the c3 language.
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58 This is a subset of the C language with some additional features.
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59
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274
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60 .. graphviz::
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61
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62 digraph c3 {
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63 rankdir="LR"
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64 1 [label="source text"]
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65 10 [label="lexer" ]
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66 20 [label="parser" ]
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67 30 [label="semantic checks" ]
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68 40 [label="code generation"]
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69 99 [label="IR-code object"]
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70 1 -> 20
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71 20 -> 30
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72 30 -> 40
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73 40 -> 99
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74 subgraph rel1 {
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75 edge [dir=none]
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76 10 -> 20
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77 }
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78 }
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79
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80 .. autoclass:: c3.Builder
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273
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81
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82 .. autoclass:: c3.Parser
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83
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84 .. autoclass:: c3.CodeGenerator
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85
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86 Back-end
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87 --------
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88
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89 The back-end is more complicated. There are several steps to be taken here.
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90
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91 1. Instruction selection
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92 2. register allocation
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93 3. Peep hole optimization?
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94 4. real code generation
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95
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96 .. automodule:: codegenarm
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97 :members:
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98
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274
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99 Instruction selection
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100 ~~~~~~~~~~~~~~~~~~~~~
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101
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102 The instruction selection phase takes care of scheduling and instruction
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103 selection. The output of this phase is a one frame per function with a flat
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104 list of abstract machine instructions.
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105
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106 .. autoclass:: irmach.Frame
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107
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108 .. autoclass:: irmach.AbstractInstruction
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109
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110
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