annotate python/ppci/linker.py @ 362:c05ab629976a

Added CPUID for arm
author Windel Bouwman
date Sat, 15 Mar 2014 10:56:34 +0100
parents 5477e499b039
children 396e5cefba13
rev   line source
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1 import logging
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2 import struct
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3 from .objectfile import ObjectFile
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4 from . import CompilerError
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5
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6 def align(x, m):
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7 while ((x % m) != 0):
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8 x = x + 1
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9 return x
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10
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11 def wrap_negative(x, bits):
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12 b = struct.unpack('<I', struct.pack('<i', x))[0]
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13 mask = (1 << bits) - 1
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14 return b & mask
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15
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16 reloc_map = {}
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17
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18 def reloc(t):
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19 def f(c):
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20 reloc_map[t] = c
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21 return f
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23
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24 @reloc('lit_add_8')
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25 def apply_lit8(reloc, sym, section, reloc_value):
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26 assert sym.value % 4 == 0
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27 offset = (sym.value - (align(reloc_value + 2, 4)))
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28 assert offset in range(0, 1024, 4), str(offset)+str( self.dst.sections)
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29 rel8 = offset >> 2
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30 section.data[reloc.offset] = rel8
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32
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33 @reloc('wrap_new11')
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34 def apply_wrap_new11(reloc, sym, section, reloc_value):
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35 offset = sym.value - (align(reloc_value, 2) + 4)
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36 assert offset in range(-2048, 2046, 2)
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37 imm11 = wrap_negative(offset >> 1, 11)
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38 section.data[reloc.offset] = (imm11 & 0xff)
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39 section.data[reloc.offset + 1] |= (imm11 >> 8) & 0x7
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41
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42 @reloc('rel8')
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43 def apply_rel8(reloc, sym, section, reloc_value):
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44 assert sym.value % 2 == 0
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45 offset = sym.value - (align(reloc_value, 2) + 4)
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46 assert offset in range(-256, 254, 2), str(offset) + str(reloc)
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47 imm8 = wrap_negative(offset >> 1, 8)
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48 section.data[reloc.offset] = imm8
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51 @reloc('bl_imm11_imm10')
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52 def apply_bl_imm11(reloc, sym, section, reloc_value):
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53 assert sym.value % 2 == 0
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54 offset = sym.value - (align(reloc_value, 2) + 4)
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55 assert offset in range(-16777216, 16777214, 2), str(offset)
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56 imm32 = wrap_negative(offset >> 1, 32)
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57 imm11 = imm32 & 0x7FF
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58 imm10 = (imm32 >> 11) & 0x3FF
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59 s = (imm32 >> 24) & 0x1
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60 section.data[reloc.offset + 2] = imm11 & 0xFF
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61 section.data[reloc.offset + 3] |= (imm11 >> 8) & 0x7
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62 section.data[reloc.offset] = imm10 & 0xff
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63 section.data[reloc.offset + 1] |= ((imm10 >> 8) & 0x3) | (s << 2)
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64
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65 @reloc('b_imm11_imm6')
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66 def apply_b_imm11_imm6(reloc, sym, section, reloc_value):
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67 assert sym.value % 2 == 0
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68 offset = sym.value - (align(reloc_value, 2) + 4)
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69 assert offset in range(-1048576, 1048574, 2), str(offset)
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70 imm32 = wrap_negative(offset >> 1, 32)
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71 imm11 = imm32 & 0x7FF
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72 imm6 = (imm32 >> 11) & 0x3F
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73 s = (imm32 >> 24) & 0x1
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74 section.data[reloc.offset + 2] = imm11 & 0xFF
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75 section.data[reloc.offset + 3] |= (imm11 >> 8) & 0x7
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76 section.data[reloc.offset] |= imm6
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77 section.data[reloc.offset + 1] |= (s << 2)
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78
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79 # ARM reloc!!
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80 # TODO: move to target classes???
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81 @reloc('b_imm24')
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82 def apply_b_imm24(reloc, sym, section, reloc_value):
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83 assert sym.value % 4 == 0
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84 assert reloc_value % 4 == 0
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85 offset = (sym.value - (reloc_value + 8))
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86 rel24 = wrap_negative(offset >> 2, 24)
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87 section.data[reloc.offset+2] = (rel24 >> 16) & 0xFF
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88 section.data[reloc.offset+1] = (rel24 >> 8) & 0xFF
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89 section.data[reloc.offset+0] = rel24 & 0xFF
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90
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91
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92 @reloc('ldr_imm12')
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93 def apply_ldr_imm12(reloc, sym, section, reloc_value):
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94 assert sym.value % 4 == 0
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95 assert reloc_value % 4 == 0
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96 offset = (sym.value - (reloc_value + 8))
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97 U = 1
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98 if offset < 0:
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99 offset = -offset
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100 U = 0
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101 assert offset < 4096
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102 section.data[reloc.offset+2] |= (U << 7) #(rel24 >> 16) & 0xFF
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103 section.data[reloc.offset+1] |= (offset >> 8) & 0xF
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104 section.data[reloc.offset+0] = offset & 0xFF
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105
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106 @reloc('adr_imm12')
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107 def apply_adr_imm12(reloc, sym, section, reloc_value):
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108 assert sym.value % 4 == 0
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109 assert reloc_value % 4 == 0
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110 offset = (sym.value - (reloc_value + 8))
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111 U = 2
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112 if offset < 0:
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113 offset = -offset
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114 U = 1
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115 assert offset < 4096
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116 section.data[reloc.offset+2] |= (U << 6) #(rel24 >> 16) & 0xFF
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117 section.data[reloc.offset+1] |= (offset >> 8) & 0xF
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118 section.data[reloc.offset+0] = offset & 0xFF
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119
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120
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121 class Linker:
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122 """ Merges the sections of several object files and
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123 performs relocation """
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124 def __init__(self):
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125 self.logger = logging.getLogger('Linker')
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126
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127 def link(self, objs, layout={}):
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128 # Create new object file to store output:
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129 self.dst = ObjectFile()
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130
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131 # Create sections with address:
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132 for section_name, address in layout.items():
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133 self.dst.get_section(section_name).address = address
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134
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135 # First copy all sections into output sections:
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136 for iobj in objs:
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137 offsets = {}
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138 # Merge sections:
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139 for in_s in iobj.sections.values():
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140 out_s = self.dst.get_section(in_s.name)
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141 # TODO: align section in other way:
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142 while out_s.Size % 4 != 0:
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143 out_s.add_data(bytes([0]))
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144
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145 # Add new section:
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146 offsets[in_s.name] = out_s.Size
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147 out_s.add_data(in_s.data)
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148 self.logger.debug('{} {}({})'.format(offsets[in_s.name], iobj, in_s.name))
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149
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150 # Merge symbols:
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151 for sym in iobj.symbols.values():
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152 out_s = self.dst.get_section(sym.section)
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153 value = offsets[sym.section] + out_s.address + sym.value
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154 self.dst.add_symbol(sym.name, value, sym.section)
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155
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156 # Merge relocations:
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157 for reloc in iobj.relocations:
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158 offset = offsets[reloc.section] + reloc.offset
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159 self.dst.add_relocation(reloc.sym, offset, reloc.typ, reloc.section)
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160
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161 # Perform relocations:
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162 for reloc in self.dst.relocations:
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163 # Lookup symbol:
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164 if reloc.sym not in self.dst.symbols:
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165 raise CompilerError('Undefined reference "{}"'.format(reloc.sym))
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166 sym = self.dst.symbols[reloc.sym]
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167 # patch up:
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168 section = self.dst.get_section(reloc.section)
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169
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170 # Determine location in memory of reloc patchup position:
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171 reloc_value = section.address + reloc.offset
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172
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173 if reloc.typ in reloc_map:
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174 f = reloc_map[reloc.typ]
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175 f(reloc, sym, section, reloc_value)
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176 else:
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177 raise NotImplementedError('Unknown relocation type {}'.format(reloc.typ))
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178
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179 return self.dst