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292
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1 from .basetarget import Register, Instruction, Target
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201
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2 from asmnodes import ASymbol, ANumber
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3 from ppci import CompilerError
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290
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4 import struct
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5 import types
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201
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6
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7 # Create the target class (singleton):
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8 msp430target = Target("MSP430")
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9
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10 REGISTER_MODE = 1
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202
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11 SYMBOLIC_MODE = 3
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12 ABSOLUTE_MODE = 4
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201
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13 #TODO: add more modes!
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14 IMMEDIATE_MODE = 7
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15
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199
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16 # Target description for the MSP430 processor
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17
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18 class MSP430Reg(Register):
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19 def __init__(self, num, name):
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20 super().__init__(name)
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21 self.num = num
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22
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200
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23 # 8 bit registers:
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199
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24 PCB = MSP430Reg(0, 'r0')
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25 rpc = PCB
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26 r11 = MSP430Reg(11, 'r11')
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27 r12 = MSP430Reg(12, 'r12')
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200
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28 r13 = MSP430Reg(13, 'r13')
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29 r14 = MSP430Reg(14, 'r14')
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30 r15 = MSP430Reg(15, 'r15')
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199
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31
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32 class MSP430Mem:
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33 pass
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34
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35 msp430target.registers.append(r11)
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36 msp430target.registers.append(r12)
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37 msp430target.registers.append(r13)
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38 msp430target.registers.append(r14)
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39 msp430target.registers.append(r15)
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40
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199
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41 # .. etc
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42
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43 #GR8 = RegisterClass((PCB, R15B))
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44
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201
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45 class MSP430Operand:
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46 def __init__(self, mode, param):
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47 self.mode = mode
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48 self.param = param
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49 def regField(self):
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50 if self.mode == REGISTER_MODE:
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51 return self.param
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52 elif self.mode == IMMEDIATE_MODE:
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53 return rpc.num
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54 def asField(self):
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55 if self.mode == REGISTER_MODE:
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56 return 0
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57 elif self.mode == IMMEDIATE_MODE:
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58 return 3
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59 def adField(self):
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60 if self.mode == REGISTER_MODE:
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61 return 0
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62 elif self.mode == IMMEDIATE_MODE:
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63 raise CompilerError('Cannot use immediate mode for destination operand')
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64 def extraBytes(self):
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65 if self.mode == IMMEDIATE_MODE:
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66 return pack_ins(self.param)
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67 return bytes()
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203
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68
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69 @classmethod
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70 def Create(cls, vop):
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71 if type(vop) is ASymbol:
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72 # try to map to register:
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73 regs = {}
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74 for r in msp430target.registers:
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75 regs[r.name] = r
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76 if vop.name in regs:
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77 reg = regs[vop.name]
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78 return cls(REGISTER_MODE, reg.num)
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79 elif type(vop) is ANumber:
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80 # Immediate mode:
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81 return cls(IMMEDIATE_MODE, vop.number)
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200
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82
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201
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83 def pack_ins(h):
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84 return struct.pack('<H', h)
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85
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86 class MSP430Instruction(Instruction):
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87 b = 0
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88
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89 class BInstruction:
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90 pass
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91
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92 class MSP430CoreInstruction(Instruction):
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93 pass
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94
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95 #########################
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96 # Single operand arithmatic:
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97 #########################
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98
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99 @msp430target.instruction
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100 class reti_ins(MSP430Instruction):
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101 mnemonic = 'reti'
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102 operands = ()
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103 def encode(self):
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104 h = 0x1300
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105 return pack_ins(h)
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106
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107 class OneOpArith(MSP430Instruction):
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108 operands = (MSP430Reg, )
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109 def __init__(self, op1):
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200
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110 self.op1 = op1
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111 def encode(self):
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112 # TODO:
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113 bits[15:10] = '00100'
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114 h1 = (self.opcode << 4)
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115 return pack_ins(h1)
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116
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202
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117 def oneOpIns(mne, opc):
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118 """ Helper function to define a one operand arithmetic instruction """
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119 members = {'mnemonic': mne, 'opcode': opc}
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120 ins_cls = type(mne + '_ins', (OneOpArith,), members)
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121 msp430target.addInstruction(ins_cls)
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122
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123 oneOpIns('rrc', 0)
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124 oneOpIns('swpb', 1)
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125 oneOpIns('rra', 2)
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126 oneOpIns('sxt', 3)
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127 oneOpIns('push', 4)
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128 oneOpIns('call', 5)
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201
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129
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130 #########################
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131 # Jump instructions:
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132 #########################
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133
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134 class JumpInstruction(Instruction):
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135 def __init__(self, offset):
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136 self.offset = offset
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137
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138 def encode(self):
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139 h = (1 << 13) | (self.condition << 10) | (self.offset)
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140 return pack_ins(h)
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141
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142 @msp430target.instruction
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143 class jnz_ins(JumpInstruction):
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144 mnemonic = 'jnz'
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145 condition = 0
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146
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147 @msp430target.instruction
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148 class jz_ins(JumpInstruction):
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149 mnemonic = 'jz'
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150 condition = 1
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151
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152 @msp430target.instruction
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153 class jnc_ins(JumpInstruction):
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154 mnemonic = 'jnc'
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155 condition = 2
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156
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201
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157 @msp430target.instruction
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158 class jc_ins(JumpInstruction):
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159 mnemonic = 'jc'
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160 condition = 3
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161
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162 @msp430target.instruction
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163 class jn_ins(JumpInstruction):
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164 mnemonic = 'jn'
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165 condition = 4
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166
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167 @msp430target.instruction
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168 class jge_ins(JumpInstruction):
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169 mnemonic = 'jge'
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170 condition = 5
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171
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172 @msp430target.instruction
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173 class jl_ins(JumpInstruction):
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174 mnemonic = 'jl'
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175 condition = 6
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176
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177 @msp430target.instruction
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178 class jmp_ins(JumpInstruction):
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179 mnemonic = 'jmp'
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180 condition = 7
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181
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182 #########################
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183 # Two operand arithmatic instructions:
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184 #########################
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185
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186
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187 class TwoOpArith(MSP430Instruction):
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188 operands = (MSP430Operand, MSP430Operand)
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189 def __init__(self, src, dst):
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190 self.op1 = src
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191 self.op2 = dst
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192
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193 def encode(self):
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194 """
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195 Smart things have been done by MSP430 designers.
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196 As (2 bits) is the source addressing mode selector.
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197 Ad (1 bit) is the destination adressing mode selector.
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198 For the source there are 7 different addressing mode.
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199 For the destination there are 4.
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200 The trick is to use also the register to distuingish the
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201 different modes.
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202 """
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203 # TODO: Make memory also possible
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204
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205 As = self.op1.asField() # addressing mode for the source
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206 Ad = self.op2.adField() # Addressing mode for dst
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207 b = self.b # When b=1, the operation is byte mode
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208 source = self.op1.regField()
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209 destination = self.op2.regField()
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210 h = (self.opcode << 12) | (source << 8)
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211 h |= (self.b << 6) | (As << 4) | (Ad << 7) | destination
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212 additions = self.op1.extraBytes() + self.op2.extraBytes()
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213 return pack_ins(h) + additions
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214
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215 def decode(self, data):
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216 pass
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217
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200
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218
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219 def twoOpIns(mne, opc):
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220 """ Helper function to define a two operand arithmetic instruction """
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221 members = {'mnemonic': mne, 'opcode': opc}
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222 ins_cls = type(mne + '_ins', (TwoOpArith,), members)
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223 msp430target.addInstruction(ins_cls)
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224
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225 twoOpIns('mov', 4)
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226
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227 # This is equivalent to the helper function twoOpIns:
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228 @msp430target.instruction
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229 class add_ins(TwoOpArith):
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202
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230 """ Adds the source to the destination """
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231 mnemonic = 'add'
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232 opcode = 5
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233
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202
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234 def operate(self):
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235 dst.value = dst.value + src.value
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236 setFlags()
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237
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238 twoOpIns('addc', 6)
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239 twoOpIns('subc', 7)
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240 twoOpIns('sub', 8)
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241 twoOpIns('cmp', 9)
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242 twoOpIns('dadd', 10)
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243 twoOpIns('bit', 11)
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244 twoOpIns('bic', 12)
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245 twoOpIns('bis', 13)
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246 twoOpIns('xor', 14)
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247 twoOpIns('and', 15)
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