Mercurial > lcfOS
annotate python/stm32f4/blink.c3 @ 228:7f18ed9b6b7e
Removal of emptystatement class
| author | Windel Bouwman |
|---|---|
| date | Sat, 13 Jul 2013 11:12:24 +0200 |
| parents | 848c4b15fd0b |
| children | 521567d17388 |
| rev | line source |
|---|---|
| 207 | 1 // This file blinks a LED on the STM32F4 discovery board. |
| 2 package blink; | |
| 204 | 3 |
| 207 | 4 // import bla |
| 228 | 5 type struct { |
| 207 | 6 // uint32_t SR; |
| 228 | 7 } TIM_Type; |
| 8 | |
| 9 type struct { | |
| 10 int MODER; | |
| 11 int OTYPER; | |
| 12 int OSPEEDR; | |
| 13 int PUPDR; | |
| 14 int IDR; | |
| 15 int ODR; | |
| 16 } GPIO_Type; | |
| 17 | |
| 18 const GPIO_Type* GPIOD = cast<GPIO_Type*>(0x400000); | |
| 19 | |
| 20 function void delay(int count) | |
| 21 { | |
| 22 while (count > 0) | |
| 23 { | |
| 24 count = count - 1; | |
| 25 } | |
| 26 } | |
| 204 | 27 |
| 28 // Globals: | |
| 29 var int divider; | |
| 212 | 30 //const TIM2_s *TIM2;// = (TIM2_s*)0x40004; |
| 204 | 31 |
| 32 // Functions: | |
| 33 function void tim2_handler() | |
| 34 { | |
| 207 | 35 // if (TIM2->SR & TIM_SR_UIF) |
| 36 if (true) | |
| 204 | 37 { |
| 207 | 38 divider = divider + 1; |
| 219 | 39 if (divider == 100000) |
| 204 | 40 { |
| 41 divider = 0; | |
| 212 | 42 //GPIOD->ODR ^= (1 << 13); |
| 204 | 43 } |
| 44 } | |
| 45 } | |
| 46 | |
| 47 function void main() | |
| 48 { | |
| 49 divider = 0; | |
| 219 | 50 |
| 228 | 51 // delay(100); |
| 52 | |
| 219 | 53 var int* RCC_AHB1ENR; |
| 221 | 54 RCC_AHB1ENR = cast<int*>(0x40003022); |
|
220
3f6c30a5d234
Major change in expression parsing to enable pointers and structs
Windel Bouwman
parents:
219
diff
changeset
|
55 *RCC_AHB1ENR = *RCC_AHB1ENR | 8943; |
| 204 | 56 /* |
| 57 RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; | |
| 58 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; | |
| 59 | |
| 60 GPIOD->MODER = (1<<26); | |
| 61 | |
| 62 NVIC->ISER[0] |= 1<< (TIM2_IRQn); | |
| 63 | |
| 64 TIM2->PSC = 0xE000; | |
| 65 TIM2->DIER |= TIM_DIER_UIE; | |
| 66 TIM2->ARR = 0xE000; | |
| 67 TIM2->CR1 |= TIM_CR1_ARPE | TIM_CR1_CEN; | |
| 68 TIM2->EGR = 1; | |
| 69 | |
| 70 */ | |
| 205 | 71 while(true) {} |
| 204 | 72 } |
| 73 |