annotate doc/compiler.rst @ 347:742588fb8cd6 devel

Merge into devel branch
author Windel Bouwman
date Fri, 07 Mar 2014 17:10:21 +0100
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3 .. toctree::
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4
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5 ir
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7 Compiler
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8 ========
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9
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10 This chapter describes the design of the compiler.
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11 The compiler consists a frontend, mid-end and back-end. The frontend deals with
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12 source file parsing and semantics checking. The mid-end performs optimizations.
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13 This is optional. The back-end generates machine code. The front-end produces
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14 intermediate code. This is a simple representation of the source. The back-end
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15 can accept this kind of representation.
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17 .. graphviz::
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19 digraph x {
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20 rankdir="LR"
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21 1 [label="c3 source file"]
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22 10 [label="c3 front end" ]
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23 11 [label="language X front end" ]
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24 20 [label="mid end" ]
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25 30 [label="back end for X86" ]
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26 31 [label="back end for ARM" ]
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27 40 [label="object file"]
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28 1 -> 10
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29 10 -> 20 [label="IR-code"]
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30 11 -> 20 [label="IR-code"]
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31 20 -> 30 [label="IR-code"]
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32 20 -> 31 [label="IR-code"]
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33 30 -> 40
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34 }
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37 IR-code
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38 -------
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39
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40 The intermediate representation (IR) of a program de-couples the front end
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41 from the backend of the compiler.
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43 See :doc:`ir` for details about all the available instructions.
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46 C3 Front-end
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47 ------------
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48
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49 For the front-end a recursive descent parser is created for the c3 language.
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50 This is a subset of the C language with some additional features.
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51
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52 .. graphviz::
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53
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54 digraph c3 {
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55 rankdir="LR"
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56 1 [label="source text"]
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57 10 [label="lexer" ]
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58 20 [label="parser" ]
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59 40 [label="code generation"]
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60 99 [label="IR-code object"]
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61 1 -> 10
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64 40 -> 99
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65 }
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67 .. autoclass:: ppci.c3.Lexer
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69 .. autoclass:: ppci.c3.Parser
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71 .. autoclass:: ppci.c3.CodeGenerator
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73 .. autoclass:: ppci.c3.Builder
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74
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75 Back-end
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76 --------
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78 The back-end is more complicated. There are several steps to be taken here.
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79
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80 1. Instruction selection
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81 2. register allocation
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82 3. Peep hole optimization?
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83 4. real code generation
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84
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85 .. automodule:: ppci.codegen
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86 :members:
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88 Instruction selection
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89 ~~~~~~~~~~~~~~~~~~~~~
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90
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91 The instruction selection phase takes care of scheduling and instruction
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92 selection. The output of this phase is a one frame per function with a flat
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93 list of abstract machine instructions.
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94
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95 // .. autoclass:: ppci.irmach.Frame
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97 // .. autoclass:: ppci.irmach.AbstractInstruction
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