annotate python/testx86asm.py @ 206:6c6bf8890d8a

Added push and pop encodings
author Windel Bouwman
date Fri, 28 Jun 2013 16:49:38 +0200
parents 6b2bec5653f1
children
rev   line source
191
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1 #!/usr/bin/python
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2
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3 import unittest
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4
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5
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6 class AssemblerTestCase(unittest.TestCase):
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7 """
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8 test methods start with 'test*'
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9 Checks several assembly constructs agains their bytecodes
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10 """
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11 def setUp(self):
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12 self.skipTest('not implemented yet')
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13 self.assembler = Assembler('x86-64')
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14
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15 def tstAssembler(self):
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16 """ Check all kind of assembler cases """
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17 assert(assembler.shortjump(5) == [0xeb, 0x5])
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18 assert(assembler.shortjump(-2) == [0xeb, 0xfc])
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19 assert(assembler.shortjump(10,'GE') == [0x7d, 0xa])
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20 assert(assembler.nearjump(5) == [0xe9, 0x5,0x0,0x0,0x0])
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21 assert(assembler.nearjump(-2) == [0xe9, 0xf9, 0xff,0xff,0xff])
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22 assert(assembler.nearjump(10,'LE') == [0x0f, 0x8e, 0xa,0x0,0x0,0x0])
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23
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24 def testCall(self):
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25 assert(assembler.call('r10') == [0x41, 0xff, 0xd2])
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26 assert(assembler.call('rcx') == [0xff, 0xd1])
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27 def testXOR(self):
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28 assert(assembler.xorreg64('rax', 'rax') == [0x48, 0x31, 0xc0])
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29 assert(assembler.xorreg64('r9', 'r8') == [0x4d, 0x31, 0xc1])
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30 assert(assembler.xorreg64('rbx', 'r11') == [0x4c, 0x31, 0xdb])
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31
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32 def testINC(self):
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33 assert(assembler.increg64('r11') == [0x49, 0xff, 0xc3])
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34 assert(assembler.increg64('rcx') == [0x48, 0xff, 0xc1])
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35
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36 def testPush(self):
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37 assert(assembler.push('rbp') == [0x55])
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38 assert(assembler.push('rbx') == [0x53])
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39 assert(assembler.push('r12') == [0x41, 0x54])
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40 def testPop(self):
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41 assert(assembler.pop('rbx') == [0x5b])
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42 assert(assembler.pop('rbp') == [0x5d])
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43 assert(assembler.pop('r12') == [0x41, 0x5c])
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44
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45 def testAsmLoads(self):
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46 # TODO constant add testcases
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47 assert(assembler.mov('rbx', 'r14') == [0x4c, 0x89, 0xf3])
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48 assert(assembler.mov('r12', 'r8') == [0x4d, 0x89, 0xc4])
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49 assert(assembler.mov('rdi', 'rsp') == [0x48, 0x89, 0xe7])
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50
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51 def testAsmMemLoads(self):
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52 assert(assembler.mov('rax', ['r8','r15',0x11]) == [0x4b,0x8b,0x44,0x38,0x11])
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53 assert(assembler.mov('r13', ['rbp','rcx',0x23]) == [0x4c,0x8b,0x6c,0xd,0x23])
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54
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55 assert(assembler.mov('r9', ['rbp',-0x33]) == [0x4c,0x8b,0x4d,0xcd])
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56 #assert(assembler.movreg64('rbx', ['rax']) == [0x48, 0x8b,0x18])
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57
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58 assert(assembler.mov('rax', [0xb000]) == [0x48,0x8b,0x4,0x25,0x0,0xb0,0x0,0x0])
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59 assert(assembler.mov('r11', [0xa0]) == [0x4c,0x8b,0x1c,0x25,0xa0,0x0,0x0,0x0])
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60
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61 assert(assembler.mov('r11', ['RIP', 0xf]) == [0x4c,0x8b,0x1d,0x0f,0x0,0x0,0x0])
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62
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63 def testAsmMemStores(self):
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64 assert(assembler.mov(['rbp', 0x13],'rbx') == [0x48,0x89,0x5d,0x13])
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65 assert(assembler.mov(['r12', 0x12],'r9') == [0x4d,0x89,0x4c,0x24,0x12])
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66 assert(assembler.mov(['rcx', 0x11],'r14') == [0x4c,0x89,0x71,0x11])
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67
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68
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69 assert(assembler.mov([0xab], 'rbx') == [0x48,0x89,0x1c,0x25,0xab,0x0,0x0,0x0])
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70 assert(assembler.mov([0xcd], 'r13') == [0x4c,0x89,0x2c,0x25,0xcd,0x0,0x0,0x0])
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71
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72 assert(assembler.mov(['RIP', 0xf], 'r9') == [0x4c,0x89,0x0d,0x0f,0x0,0x0,0x0])
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73
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74 def testAsmMOV8(self):
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75 assert(assembler.mov(['rbp', -8], 'al') == [0x88, 0x45, 0xf8])
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76 assert(assembler.mov(['r11', 9], 'cl') == [0x41, 0x88, 0x4b, 0x09])
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77
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78 assert(assembler.mov(['rbx'], 'al') == [0x88, 0x03])
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79 assert(assembler.mov(['r11'], 'dl') == [0x41, 0x88, 0x13])
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80
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81 def testAsmLea(self):
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82 assert(assembler.leareg64('r11', ['RIP', 0xf]) == [0x4c,0x8d,0x1d,0x0f,0x0,0x0,0x0])
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83 assert(assembler.leareg64('rsi', ['RIP', 0x7]) == [0x48,0x8d,0x35,0x07,0x0,0x0,0x0])
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84
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85 assert(assembler.leareg64('rcx', ['rbp', -8]) == [0x48,0x8d,0x4d,0xf8])
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86
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87 def testAssemblerCMP(self):
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88 assert(assembler.cmpreg64('rdi', 'r13') == [0x4c, 0x39, 0xef])
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89 assert(assembler.cmpreg64('rbx', 'r14') == [0x4c, 0x39, 0xf3])
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90 assert(assembler.cmpreg64('r12', 'r9') == [0x4d, 0x39, 0xcc])
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91
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92 assert(assembler.cmpreg64('rdi', 1) == [0x48, 0x83, 0xff, 0x01])
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93 assert(assembler.cmpreg64('r11', 2) == [0x49, 0x83, 0xfb, 0x02])
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94 def testAssemblerADD(self):
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95 assert(assembler.addreg64('rbx', 'r13') == [0x4c, 0x01, 0xeb])
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96 assert(assembler.addreg64('rax', 'rbx') == [0x48, 0x01, 0xd8])
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97 assert(assembler.addreg64('r12', 'r13') == [0x4d, 0x01, 0xec])
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98
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99 assert(assembler.addreg64('rbx', 0x13) == [0x48, 0x83, 0xc3, 0x13])
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100 assert(assembler.addreg64('r11', 0x1234567) == [0x49, 0x81, 0xc3, 0x67, 0x45,0x23,0x1])
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101 assert(assembler.addreg64('rsp', 0x33) == [0x48, 0x83, 0xc4, 0x33])
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102
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103 def testAssemblerSUB(self):
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104 assert(assembler.subreg64('rdx', 'r14') == [0x4c, 0x29, 0xf2])
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105 assert(assembler.subreg64('r15', 'rbx') == [0x49, 0x29, 0xdf])
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106 assert(assembler.subreg64('r8', 'r9') == [0x4d, 0x29, 0xc8])
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107
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108 assert(assembler.subreg64('rsp', 0x123456) == [0x48, 0x81, 0xec, 0x56,0x34,0x12,0x0])
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109 assert(assembler.subreg64('rsp', 0x12) == [0x48, 0x83, 0xec, 0x12])
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110
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111 def testAssemblerIDIV(self):
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112 assert(assembler.idivreg64('r11') == [0x49, 0xf7, 0xfb])
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113 assert(assembler.idivreg64('rcx') == [0x48, 0xf7, 0xf9])
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114 assert(assembler.idivreg64('rsp') == [0x48, 0xf7, 0xfc])
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115
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116 def testAssemblerIMUL(self):
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117 assert(assembler.imulreg64_rax('rdi') == [0x48, 0xf7, 0xef])
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118 assert(assembler.imulreg64_rax('r10') == [0x49, 0xf7, 0xea])
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119 assert(assembler.imulreg64_rax('rdx') == [0x48, 0xf7, 0xea])
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120
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121 assert(assembler.imulreg64('r11', 'rdi') == [0x4c, 0xf, 0xaf, 0xdf])
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122 assert(assembler.imulreg64('r12', 'rbx') == [0x4c, 0xf, 0xaf, 0xe3])
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123 # nasm generates this machine code: 0x4d, 0x6b, 0xff, 0xee
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124 # This also works: 4D0FAFFE (another variant?? )
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125 assert(assembler.imulreg64('r15', 'r14') == [0x4d, 0x0f, 0xaf, 0xfe])
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126
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127
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128 if __name__ == '__main__':
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129 unittest.main()
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130