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199
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1 from target import Register, Instruction, Target
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201
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2 from asmnodes import ASymbol, ANumber
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3 from ppci import CompilerError
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4 import struct, types
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5
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6 # Create the target class (singleton):
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7 msp430target = Target("MSP430")
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8
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9 REGISTER_MODE = 1
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10 SYMBOLIC_MODE = 3
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11 ABSOLUTE_MODE = 4
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201
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12 #TODO: add more modes!
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13 IMMEDIATE_MODE = 7
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14
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199
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15 # Target description for the MSP430 processor
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16
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17 class MSP430Reg(Register):
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18 def __init__(self, num, name):
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19 super().__init__(name)
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20 self.num = num
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21
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200
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22 # 8 bit registers:
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23 PCB = MSP430Reg(0, 'r0')
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24 rpc = PCB
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25 r11 = MSP430Reg(11, 'r11')
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26 r12 = MSP430Reg(12, 'r12')
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200
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27 r13 = MSP430Reg(13, 'r13')
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28 r14 = MSP430Reg(14, 'r14')
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29 r15 = MSP430Reg(15, 'r15')
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30
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31 class MSP430Mem:
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32 pass
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33
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34 msp430target.registers.append(r11)
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35 msp430target.registers.append(r12)
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36 msp430target.registers.append(r13)
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37 msp430target.registers.append(r14)
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38 msp430target.registers.append(r15)
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39
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199
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40 # .. etc
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41
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42 #GR8 = RegisterClass((PCB, R15B))
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43
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201
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44 class MSP430Operand:
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45 def __init__(self, mode, param):
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46 self.mode = mode
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47 self.param = param
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48 def regField(self):
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49 if self.mode == REGISTER_MODE:
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50 return self.param
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51 elif self.mode == IMMEDIATE_MODE:
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52 return rpc.num
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53 def asField(self):
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54 if self.mode == REGISTER_MODE:
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55 return 0
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56 elif self.mode == IMMEDIATE_MODE:
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57 return 3
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58 def adField(self):
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59 if self.mode == REGISTER_MODE:
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60 return 0
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61 elif self.mode == IMMEDIATE_MODE:
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62 raise CompilerError('Cannot use immediate mode for destination operand')
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63 def extraBytes(self):
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64 if self.mode == IMMEDIATE_MODE:
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65 return pack_ins(self.param)
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66 return bytes()
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203
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67
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68 @classmethod
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69 def Create(cls, vop):
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70 if type(vop) is ASymbol:
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71 # try to map to register:
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72 regs = {}
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73 for r in msp430target.registers:
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74 regs[r.name] = r
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75 if vop.name in regs:
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76 reg = regs[vop.name]
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77 return cls(REGISTER_MODE, reg.num)
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78 elif type(vop) is ANumber:
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79 # Immediate mode:
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80 return cls(IMMEDIATE_MODE, vop.number)
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81
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82 def pack_ins(h):
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83 return struct.pack('<H', h)
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84
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85 class MSP430Instruction(Instruction):
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86 b = 0
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87
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88 class BInstruction:
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89 pass
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90
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91 class MSP430CoreInstruction(Instruction):
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92 pass
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93
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94 #########################
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95 # Single operand arithmatic:
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96 #########################
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97
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98 @msp430target.instruction
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99 class reti_ins(MSP430Instruction):
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100 mnemonic = 'reti'
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101 operands = ()
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102 def encode(self):
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103 h = 0x1300
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104 return pack_ins(h)
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105
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106 class OneOpArith(MSP430Instruction):
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107 operands = (MSP430Reg, )
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108 def __init__(self, op1):
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109 self.op1 = op1
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110 def encode(self):
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111 # TODO:
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112 bits[15:10] = '00100'
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113 h1 = (self.opcode << 4)
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114 return pack_ins(h1)
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115
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202
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116 def oneOpIns(mne, opc):
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117 """ Helper function to define a one operand arithmetic instruction """
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118 members = {'mnemonic': mne, 'opcode': opc}
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119 ins_cls = type(mne + '_ins', (OneOpArith,), members)
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120 msp430target.addInstruction(ins_cls)
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121
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122 oneOpIns('rrc', 0)
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123 oneOpIns('swpb', 1)
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124 oneOpIns('rra', 2)
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125 oneOpIns('sxt', 3)
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126 oneOpIns('push', 4)
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127 oneOpIns('call', 5)
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201
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128
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129 #########################
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130 # Jump instructions:
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131 #########################
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132
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133 class JumpInstruction(Instruction):
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134 def __init__(self, offset):
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135 self.offset = offset
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136
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137 def encode(self):
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138 h = (1 << 13) | (self.condition << 10) | (self.offset)
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139 return pack_ins(h)
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140
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141 @msp430target.instruction
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142 class jnz_ins(JumpInstruction):
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143 mnemonic = 'jnz'
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144 condition = 0
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145
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146 @msp430target.instruction
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147 class jz_ins(JumpInstruction):
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148 mnemonic = 'jz'
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149 condition = 1
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150
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151 @msp430target.instruction
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152 class jnc_ins(JumpInstruction):
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153 mnemonic = 'jnc'
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154 condition = 2
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155
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201
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156 @msp430target.instruction
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157 class jc_ins(JumpInstruction):
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158 mnemonic = 'jc'
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159 condition = 3
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160
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161 @msp430target.instruction
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162 class jn_ins(JumpInstruction):
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163 mnemonic = 'jn'
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164 condition = 4
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165
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166 @msp430target.instruction
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167 class jge_ins(JumpInstruction):
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168 mnemonic = 'jge'
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169 condition = 5
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170
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171 @msp430target.instruction
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172 class jl_ins(JumpInstruction):
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173 mnemonic = 'jl'
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174 condition = 6
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175
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176 @msp430target.instruction
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177 class jmp_ins(JumpInstruction):
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178 mnemonic = 'jmp'
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179 condition = 7
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180
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181 #########################
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182 # Two operand arithmatic instructions:
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183 #########################
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184
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185
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186 class TwoOpArith(MSP430Instruction):
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187 operands = (MSP430Operand, MSP430Operand)
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188 def __init__(self, src, dst):
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189 self.op1 = src
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190 self.op2 = dst
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191
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192 def encode(self):
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193 """
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194 Smart things have been done by MSP430 designers.
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195 As (2 bits) is the source addressing mode selector.
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196 Ad (1 bit) is the destination adressing mode selector.
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197 For the source there are 7 different addressing mode.
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198 For the destination there are 4.
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199 The trick is to use also the register to distuingish the
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200 different modes.
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201 """
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202 # TODO: Make memory also possible
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203
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204 As = self.op1.asField() # addressing mode for the source
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205 Ad = self.op2.adField() # Addressing mode for dst
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206 b = self.b # When b=1, the operation is byte mode
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207 source = self.op1.regField()
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208 destination = self.op2.regField()
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209 h = (self.opcode << 12) | (source << 8)
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210 h |= (self.b << 6) | (As << 4) | (Ad << 7) | destination
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211 additions = self.op1.extraBytes() + self.op2.extraBytes()
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212 return pack_ins(h) + additions
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213
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214 def decode(self, data):
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215 pass
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216
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200
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217
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218 def twoOpIns(mne, opc):
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219 """ Helper function to define a two operand arithmetic instruction """
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220 members = {'mnemonic': mne, 'opcode': opc}
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221 ins_cls = type(mne + '_ins', (TwoOpArith,), members)
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222 msp430target.addInstruction(ins_cls)
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223
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224 twoOpIns('mov', 4)
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225
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226 # This is equivalent to the helper function twoOpIns:
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227 @msp430target.instruction
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228 class add_ins(TwoOpArith):
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202
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229 """ Adds the source to the destination """
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230 mnemonic = 'add'
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231 opcode = 5
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232
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202
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233 def operate(self):
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234 dst.value = dst.value + src.value
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235 setFlags()
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236
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237 twoOpIns('addc', 6)
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238 twoOpIns('subc', 7)
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239 twoOpIns('sub', 8)
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240 twoOpIns('cmp', 9)
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241 twoOpIns('dadd', 10)
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242 twoOpIns('bit', 11)
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243 twoOpIns('bic', 12)
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244 twoOpIns('bis', 13)
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245 twoOpIns('xor', 14)
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246 twoOpIns('and', 15)
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247
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