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annotate cos/kernel/goto64.asm @ 218:494828a7adf1

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added some sort of cache to assembler
author Windel Bouwman
date Fri, 05 Jul 2013 15:30:22 +0200
parents bcb3b68c8147
children
rev   line source
9
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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1 ;#!/usr/bin/nasm
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2
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3 ;
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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4 ; See http://wiki.osdev.org/User:Stephanvanschaik/Setting_Up_Long_Mode
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5 ; Loader assembly to load the 64 bits kernel just after this file.
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6
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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7 ; Assume that we are loaded at 1M (0x100000)
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8
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9 ; This file sets up long mode and creates paging tables.
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10 ; Use 2 mbyte pages. Is this more efficient?
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11
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12 ; Intended memory map (copied from pure64), at the end of this file:
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13 ; MOVED TO 0x5000!! 0x0 : IDT, 256 entries
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14 ; 0x1000 - 0x2000 : PML4 (Page map level 4)
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15 ; 0x2000 - 0x3000 : PDPT (page directory pointer table)
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16 ; 0x3000 - 0x4000 : PDT (page directory table)
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17 ; 0x4000 - 0x5000 : PT (page table)
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18 ; 0x5000 - 0x6000 : IDT entries
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19 ; 0x6000 - 0xA000 : Stack
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20
20
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21 bits 32 ; Start in 32 bits mode, as loaded by GRUB
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22
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92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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23 ; Multiboot header:
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24 ; Settings for multiboot header
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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25 PAGE_ALIGN equ 1 << 0
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26 MEM_INFO equ 1 << 1
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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27 KLUDGE equ 1 << 16
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28 MAGIC equ 0x1BADB002
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29 FLAGS equ PAGE_ALIGN | MEM_INFO | KLUDGE ; align and provide memory map
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30 CHECKSUM equ -(MAGIC+FLAGS)
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31
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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32 ; actual multiboot header:
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33 align 4
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34 MultiBootHeader:
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35 dd MAGIC
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36 dd FLAGS
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37 dd CHECKSUM
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38 ; item below are present if bit 16 is set in flags
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bcb3b68c8147 Added bss end address and load end address to multiboot header
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39 extern load_end_address ; Import load end address from linker script
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40 extern bss_end_address ; Import bss end address to make sure data is zero initialized.
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41 dd MultiBootHeader ; physical address in file of header (will be 0x100000 if put at start)
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42 dd 0x100000 ; load_addr: load address, the address to start loading
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43 dd load_end_address ; load_end_addr: zero indicates to load whole file
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44 dd bss_end_address ; bss_end_addr: zero indicates no bss segment present
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45 dd loader ; entry_addr: jump to here
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46
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47 ; 32 bits temporary GDT:
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48 align 16
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49 gdt32:
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50 dw 0x0000, 0x0000, 0x0000, 0x0000 ; Null desciptor
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51 dw 0xFFFF, 0x0000, 0x9A00, 0x00CF ; 32-bit code desciptor
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52 dw 0xFFFF, 0x0000, 0x9200, 0x008F ; 32-bit data desciptor
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53 gdt32_end:
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54
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55 ; 32 bits gdt pointer:
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56 align 16
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57 gdt32pointer: ; Global Descriptors Table Register
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58 dw gdt32_end - gdt32 - 1 ; limit of GDT (size minus one)
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59 dq gdt32 ; linear address of GDT
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60
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61 ; GDT, three entries: one for code, one for data
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62 align 16
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63 gdt64:
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64 .Null: equ $ - gdt64
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65 dq 0
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66 .Code: equ $ - gdt64
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67 dw 0 ; Segment limit 15-0
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68 dw 0 ; Base 15 - 0
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69 db 0 ; Base 23 - 16
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70 db 10011000b ; access 0x98 (P=1 => Present)
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71 db 00100000b ; granularity 0x20 (L=1 => long mode)
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72 db 0
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73 .Data: equ $ - gdt64
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74 dw 0
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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75 dw 0
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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76 db 0
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77 db 10010000b ; access ; 0x90
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78 db 00000000b ; granularity 0x00
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92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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79 db 0
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80 gdt64end:
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81
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82 ;SYS64_NULL_SEL equ $-gdt64 ; Null Segment
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83 ; dq 0x0000000000000000
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84 ; SYS64_CODE_SEL equ $-gdt64 ; Code segment, read/execute, nonconforming
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85 ; dq 0x0020980000000000 ; 0x00209A0000000000
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86 ; SYS64_DATA_SEL equ $-gdt64 ; Data segment, read/write, expand down
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87 ; dq 0x0000900000000000 ; 0x0020920000000000
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88 ; gdt64_end:
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89
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90 gdt64pointer: ; GDT pointer
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91 dw gdt64end - gdt64 - 1 ; Limit (size)
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92 dq gdt64 ; Base
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93
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94 hltmessage:
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95 db "Long mode not supported", 0x0
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96
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92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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97 ; Start of loader code:
92ace1ca50a8 64 bits kernel without interrupts but with printf in C
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98 loader:
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99 ; here ebx contains the pointer to the multiboot header, store is for later use.
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100 ; Make sure that multiboot_info is located in the BSS section and that this section
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101 ; is proper zeroed.
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102 extern multiboot_info
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103 mov [multiboot_info], ebx
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104
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105 ; Check that the CPU supports long mode:
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106 mov eax, 80000000h
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107 cpuid
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108 cmp eax, 80000000h
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109 jbe no_long_mode
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110 mov eax, 80000001h
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111 cpuid
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112 bt edx, 29
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113 jnc no_long_mode
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114 jmp cpu_has_long_mode
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115
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116 no_long_mode:
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117 ; Print long mode not supported
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118 mov edi, 0xb8000
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119 mov esi, hltmessage
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120 xor eax, eax
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121 loop1:
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122 lodsb
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123 mov dl, al
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124 stosb
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125 mov al, 0x1f
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126 stosb
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127 cmp dl, 0
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128 jne loop1
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129 hlt
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130
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131 cpu_has_long_mode:
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132
20
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133 lgdt [gdt32pointer] ; Reload a valid temporary 32 bits GDT, overload GRUB gdt.
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134 mov ax, 0x10
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135 mov ds, ax
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136 mov es, ax
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137 mov fs, ax
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138 mov gs, ax
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139 mov ss, ax
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140 jmp 8:start32 ; make sure CS is loaded.
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141 start32:
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142
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143 cld ; clear direction?
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144
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145 ; Clear the paging tables 0x1000, 0x2000, 0x3000 and 0x4000:
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146 mov edi, 0x1000
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147 xor eax, eax
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148 mov ecx, 0x1000
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149 rep stosd
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150
20
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151 ; Create PML4 table:
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152 mov edi, 0x1000
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153 mov eax, 0x2003
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154 stosd
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155
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156 ; Create PDP (page directory pointer) table:
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157 mov edi, 0x2000
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158 mov eax, 0x3003 ; PDPT entry, present and read/write
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159 stosd
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160
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161 ; Create PD (page directory) table
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162 mov edi, 0x3000
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163 ; First entry:
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164 mov eax, 0x8F ; PD entry, present (bit 0), read write (bit 1) and bit 7, page size=2MB
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165 stosd
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166 xor eax, eax
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167 stosd
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168
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169 ; Second entry:
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170 mov eax, 0x20008f
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171 stosd
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172 xor eax, eax
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173 stosd
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174
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175 ; Third entry:
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176 mov eax, 0x40008f
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177 stosd
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178 xor eax, eax
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179 stosd
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180 ; 6 MB mapped in total now.
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181
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182 mov edi, 0x1000 ; Set load address
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183 mov cr3, edi ; CR3 is the PML4 base address!
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184
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185 ; Enable address extension:
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186 mov eax, cr4
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187 or eax, 1 << 5 ; PAE-bit is bit 5
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188 mov cr4, eax
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189
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190 lgdt [gdt64pointer] ; Load the GDT
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191
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192 ; Set LM-bit (Long Mode bit):
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193 mov ecx, 0xC0000080
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194 rdmsr
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195 or eax, 0x100 ; Set bit 8 (LM-bit)
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196 wrmsr
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197
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198 ; Enable paging:
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199 mov eax, cr0
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200 or eax, 0x80000000 ; Set bit 31 (PG-bit)
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201 mov cr0, eax
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202
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203 ; Jump to 64 bits kernel:
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204 jmp gdt64.Code:Realm64
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205
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206 bits 64
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207 align 16
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208
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209 Realm64:
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210
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211 ; Clear segment registers:
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212 xor ax, ax
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213 mov ds, ax
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214 mov es, ax
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215 mov ss, ax
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216 mov fs, ax
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217 mov gs, ax
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218
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219 lgdt [gdt64pointer] ; Reload GDT in 64 bits mode
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220
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221 ; Test:
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222 mov ax, 0x10
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223 mov ds, ax
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224 ; End of test
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225
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226 ; TODO: determine a good place for the kernel stack.
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227 mov rsp, 0xA000 ; Setup stack pointer.
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228
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229 extern kmain
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230 call kmain ; Call kernel in C-code
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231