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1 import ppci
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158
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2 import ir
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3
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4 class AsmLabel:
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5 def __init__(self, lab):
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6 self.lab = lab
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7 def __repr__(self):
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8 return '{0}:'.format(self.lab)
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9
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10 class Op:
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11 def __init__(self, op, dst, src):
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12 self.op = op
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13 self.src = src
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14 self.dst = dst
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15 def __repr__(self):
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171
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16 return '{0} {1}, {2}'.format(self.op, self.dst, self.src)
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17
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18 class Jmp:
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19 def __init__(self, j, target):
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20 self.j = j
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21 self.target = target
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22 def __repr__(self):
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23 return '{0} {1}'.format(self.j, self.target)
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157
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24
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25 class X86CodeGen:
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26 def __init__(self, diag):
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27 self.diag = diag
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160
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28 self.regs = ['rax', 'rbx', 'rcx', 'rdx']
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29
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30 def emit(self, i):
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31 self.asm.append(i)
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32
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33 def genBin(self, ir):
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34 self.asm = []
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35 # Allocate registers:
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36 ir.registerAllocate(self.regs)
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37 self.genModule(ir)
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38 return self.asm
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39
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171
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40 def genModule(self, ir):
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41 #for f in ir.Functions:
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42 # self.genFunction(f)
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43 for bb in ir.BasicBlocks:
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44 self.genBB(bb)
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45 def genFunction(self, f):
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46 self.emit('global {0}'.format(f.name))
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47 self.emit(AsmLabel(f.name))
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48 for bb in f.BasicBlocks:
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49 self.genBB(bb)
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50 def genBB(self, bb):
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51 self.emit(AsmLabel(bb.name))
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52 for i in bb.Instructions:
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53 self.genIns(i)
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54 def genIns(self, i):
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55 if type(i) is ir.BinaryOperator:
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56 ops = {'+':'add', '-':'sub', '*':'mul'}
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57 if i.operation in ops:
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58 self.emit(Op('mov', i.result.reg, i.value1.reg))
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59 self.emit(Op(ops[i.operation], i.result.reg, i.value2.reg))
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60 else:
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61 raise NotImplementedError('op {0}'.format(i.operation))
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62 elif type(i) is ir.Load:
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63 self.emit(Op('mov', i.value, '[{0}]'.format(i.name)))
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64 elif type(i) is ir.Return:
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65 self.emit('ret')
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66 elif type(i) is ir.Call:
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67 self.emit('call')
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68 elif type(i) is ir.ImmLoad:
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69 self.emit(Op('mov', i.target, i.value))
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70 elif type(i) is ir.Store:
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71 self.emit(Op('mov', '[{0}]'.format(i.name), i.value))
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72 elif type(i) is ir.ConditionalBranch:
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73 self.emit(Op('cmp', i.a, i.b))
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74 jmps = {'>':'jg', '<':'jl', '==':'je'}
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75 if i.cond in jmps:
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76 j = jmps[i.cond]
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77 self.emit(Jmp(j, i.lab1.name))
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78 else:
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79 raise NotImplementedError('condition {0}'.format(i.cond))
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80 self.emit(Jmp('jmp', i.lab2.name))
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81 elif type(i) is ir.Branch:
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82 self.emit(Jmp('jmp', i.target.name))
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83 else:
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84 raise NotImplementedError('{0}'.format(i))
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85
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