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128
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1 import time
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256
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2 import logging
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128
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3 from devices import Device, registerDevice, STLinkException, Interface
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138
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4 import stlink
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128
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5
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6 # F4 specifics:
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7 STM32_FLASH_BASE = 0x08000000
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8 STM32_SRAM_BASE = 0x20000000
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9
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10 # flash registers:
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11 FLASH_F4_REGS_ADDR = 0x40023c00
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12 FLASH_F4_KEYR = FLASH_F4_REGS_ADDR + 0x04
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13 FLASH_F4_SR = FLASH_F4_REGS_ADDR + 0x0c
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14 FLASH_F4_CR = FLASH_F4_REGS_ADDR + 0x10
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15
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16 FLASH_F4_CR_START = 16
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17 FLASH_F4_CR_LOCK = 31
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18 FLASH_CR_PG = 0
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19 FLASH_F4_CR_SER = 1
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20 FLASH_CR_MER = 2
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21 FLASH_F4_CR_SNB = 3
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22 FLASH_F4_CR_SNB_MASK = 0x38
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23 FLASH_F4_SR_BSY = 16
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24
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25 class Stm32F4(Device):
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260
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26 """
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130
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27 Implementation of the specifics of the STM32F4xx device series.
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260
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28 """
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29 def __init__(self, iface):
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129
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30 super().__init__(iface)
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255
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31 self.logger = logging.getLogger('stm32')
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246
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32
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260
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33 def __str__(self):
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130
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34 return 'STM32F4 device size=0x{1:X} id=0x{0:X}'.format(\
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35 self.UID, self.FlashSize)
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246
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36
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260
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37 def calculate_F4_sector(self, address):
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130
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38 sectorstarts = []
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39 a = STM32_FLASH_BASE
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40 for sectorsize in self.sectorsizes:
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41 sectorstarts.append(a)
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42 a += sectorsize
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43 # linear search:
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44 sec = 0
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45 while sec < len(self.sectorsizes) and address >= sectorstarts[sec]:
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46 sec += 1
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47 sec -= 1 # one back.
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48 return sec, self.sectorsizes[sec]
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49
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260
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50 def calcSectors(self, address, size):
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130
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51 off = 0
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52 sectors = []
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53 while off < size:
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54 sectornum, sectorsize = self.calculate_F4_sector(address + off)
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55 sectors.append((sectornum, sectorsize))
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56 off += sectorsize
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57 return sectors
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260
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58
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59 # Device registers:
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60 @property
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61 def UID(self):
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130
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62 uid_base = 0x1FFF7A10
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63 uid1 = self.iface.read_debug32(uid_base)
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64 uid2 = self.iface.read_debug32(uid_base + 0x4)
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65 uid3 = self.iface.read_debug32(uid_base + 0x8)
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66 return (uid3 << 64) | (uid2 << 32) | uid1
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246
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67
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260
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68 @property
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69 def FlashSize(self):
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70 f_id = self.iface.read_debug32(0x1FFF7A22)
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71 f_id = f_id >> 16
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72 return f_id * 1024
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246
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73
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260
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74 @property
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75 def Running(self):
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138
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76 return self.iface.Status == stlink.CORE_RUNNING
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246
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77
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260
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78 # flashing commands:
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79 def writeFlash(self, address, content):
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130
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80 flashsize = self.FlashSize
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81 pagesize = min(self.sectorsizes)
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82
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83 # Check address range:
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84 if address < STM32_FLASH_BASE:
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85 raise STLinkException('Flashing below flash start')
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86 if address + len(content) > STM32_FLASH_BASE + flashsize:
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87 raise STLinkException('Flashing above flash size')
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88 if address & 1 == 1:
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89 raise STLinkException('Unaligned flash')
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90 if len(content) & 1 == 1:
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255
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91 self.logger.warning('unaligned length, padding with zero')
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92 content += bytes([0])
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93 if address & (pagesize - 1) != 0:
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94 raise STLinkException('Address not aligned with pagesize')
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95 # erase required space
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96 sectors = self.calcSectors(address, len(content))
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255
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97 self.logger.info('erasing {0} sectors'.format(len(sectors)))
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98 for sector, secsize in sectors:
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255
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99 self.logger.info('erasing sector {0} of {1} bytes'.format(sector, secsize))
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100 self.eraseFlashSector(sector)
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101 # program pages:
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102 self.unlockFlashIf()
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103 self.writeFlashCrPsiz(2) # writes are 32 bits aligned
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104 self.setFlashCrPg()
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256
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105 self.logger.info('writing {0} bytes'.format(len(content)))
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106 offset = 0
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107 t1 = time.time()
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108 while offset < len(content):
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109 size = len(content) - offset
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110 if size > 0x8000:
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111 size = 0x8000
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112 chunk = content[offset:offset + size]
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113 while len(chunk) % 4 != 0:
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114 chunk = chunk + bytes([0])
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115 # Use simple mem32 writes:
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116 self.iface.write_mem32(address + offset, chunk)
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117 offset += size
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118 self.logger.info('{}%'.format(offset*100/len(content)))
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119 self.logger.info('Done!')
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120 self.lockFlash()
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121 # verfify program:
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122 self.verifyFlash(address, content)
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260
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123
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124 def eraseFlashSector(self, sector):
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125 self.waitFlashBusy()
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126 self.unlockFlashIf()
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127 self.writeFlashCrSnb(sector)
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128 self.setFlashCrStart()
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129 self.waitFlashBusy()
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130 self.lockFlash()
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131
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132 def eraseFlash(self):
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128
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133 self.waitFlashBusy()
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134 self.unlockFlashIf()
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135 self.setFlashCrMer()
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136 self.setFlashCrStart()
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137 self.waitFlashBusy()
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138 self.clearFlashCrMer()
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139 self.lockFlash()
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256
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140
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260
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141 def verifyFlash(self, address, content):
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142 device_content = self.readFlash(address, len(content))
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143 ok = content == device_content
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144 if ok:
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145 self.logger.info('Verify: OK')
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146 else:
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147 self.logger.warning('Verify: Mismatch')
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256
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148
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260
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149 def readFlash(self, address, size):
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150 self.logger.info('Reading {1} bytes from 0x{0:X}'.format(address, size))
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151 offset = 0
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152 tmp_size = 0x1800
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153 image = bytes()
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154 while offset < size:
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155 # Correct for last page:
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156 if offset + tmp_size > size:
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157 tmp_size = size - offset
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158
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159 # align size to 4 bytes:
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160 aligned_size = tmp_size
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161 while aligned_size % 4 != 0:
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162 aligned_size += 1
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163
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164 mem = self.iface.read_mem32(address + offset, aligned_size)
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165 image += mem[:tmp_size]
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166
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167 # indicate progress:
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260
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168 self.logger.info('{}%'.format(100*len(image) / size))
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128
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169
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170 # increase for next piece:
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171 offset += tmp_size
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172 assert size == len(image)
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173 self.logger.info('Done!')
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174 return image
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175
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260
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176 def waitFlashBusy(self):
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246
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177 """ block until flash operation completes. """
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178 while self.isFlashBusy():
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179 time.sleep(0.01)
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260
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180
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181 def isFlashLocked(self):
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182 mask = 1 << FLASH_F4_CR_LOCK
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183 return self.Cr & mask == mask
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184
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185 def unlockFlashIf(self):
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186 FLASH_KEY1, FLASH_KEY2 = 0x45670123, 0xcdef89ab
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187 if self.isFlashLocked():
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188 self.iface.write_debug32(FLASH_F4_KEYR, FLASH_KEY1)
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189 self.iface.write_debug32(FLASH_F4_KEYR, FLASH_KEY2)
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190 if self.isFlashLocked():
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191 raise STLinkException('Failed to unlock')
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260
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192
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193 def lockFlash(self):
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194 self.Cr = self.Cr | (1 << FLASH_F4_CR_LOCK)
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195
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196 def readFlashSr(self):
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197 return self.iface.read_debug32(FLASH_F4_SR)
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198
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199 def readFlashCr(self):
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200 return self.iface.read_debug32(FLASH_F4_CR)
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201
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202 def writeFlashCr(self, x):
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203 self.iface.write_debug32(FLASH_F4_CR, x)
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204
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205 Cr = property(readFlashCr, writeFlashCr)
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206
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207 def writeFlashCrSnb(self, sector):
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208 x = self.Cr
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209 x &= ~FLASH_F4_CR_SNB_MASK
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210 x |= sector << FLASH_F4_CR_SNB
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211 x |= 1 << FLASH_F4_CR_SER
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260
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212 self.Cr = x
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213
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214 def setFlashCrMer(self):
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215 self.Cr = self.Cr | (1 << FLASH_CR_MER)
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216
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217 def setFlashCrPg(self):
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218 self.Cr = self.Cr | (1 << FLASH_CR_PG)
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219
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220 def writeFlashCrPsiz(self, n):
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221 x = self.Cr
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222 x &= (0x3 << 8)
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223 x |= n << 8
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224 self.Cr = x
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225
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226 def clearFlashCrMer(self):
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227 x = self.Cr
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228 x &= ~(1 << FLASH_CR_MER)
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229 self.Cr = x
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230
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231 def setFlashCrStart(self):
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232 self.Cr = self.Cr | (1 << FLASH_F4_CR_START)
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233
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234 def isFlashBusy(self):
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235 mask = 1 << FLASH_F4_SR_BSY
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236 sr = self.readFlashSr()
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237 # Check for error bits:
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238 errorbits = {}
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239 errorbits[7] = 'Programming sequence error'
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240 errorbits[6] = 'Programming parallelism error'
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241 errorbits[5] = 'Programming alignment error'
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242 errorbits[4] = 'Write protection error'
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243 errorbits[1] = 'Operation error'
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244 #errorbits[0] = 'End of operation'
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245 for bit, msg in errorbits.items():
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246 if sr & (1 << bit) == (1 << bit):
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247 raise STLinkException(msg)
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248 return sr & mask == mask
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249
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289
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250
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251 @registerDevice(0x10016413)
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252 class Stm32F40x(Stm32F4):
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253 """ STM32F40x and STM32F41x device series """
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254 def __init__(self, iface):
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255 super().__init__(iface)
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256 # Assert the proper size for this device:
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257 assert self.FlashSize == 0x100000
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258 """
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259 from 0x8000000 to 0x80FFFFF
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260 4 sectors of 0x4000 (16 kB)
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261 1 sector of 0x10000 (64 kB)
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262 7 of 0x20000 (128 kB)
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263 """
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264 self.sectorsizes = [0x4000] * 4 + [0x10000] + [0x20000] * 7
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