Mercurial > avr_jtag
comparison py_avrjtag/jtagdev.py @ 10:cc106f278d7d
Get identify of components
author | Thinker K.F. Li <thinker@branda.to> |
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date | Tue, 24 Feb 2009 13:32:04 +0800 |
parents | 074e860d7d31 |
children | 520f45b72ba7 |
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9:705da39cdf91 | 10:cc106f278d7d |
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1 import tms_ptns | 1 import tms_ptns |
2 import cmd_proto | 2 import cmd_proto |
3 | 3 |
4 class jtagdev(object): | 4 class jtagdev(object): |
5 ST_REST = 0 | 5 ST_RESET = 0 |
6 ST_IDLE = 1 | 6 ST_IDLE = 1 |
7 ST_SHIFT_DR = 2 | 7 ST_SHIFT_DR = 2 |
8 ST_SHIFT_IR = 3 | 8 ST_SHIFT_IR = 3 |
9 ST_EXIT1_DR = 4 | |
10 ST_EXIT1_IR = 5 | |
9 | 11 |
10 def __init__(self, fo): | 12 def __init__(self, fo): |
11 self.fo = fo | 13 self.fo = fo |
12 self.state = self.IDLE | 14 self.state = self.ST_IDLE |
13 self.seq = 0 | 15 self.seq = 0 |
14 pass | 16 pass |
15 | 17 |
16 def _send_cmd(self, code, data): | 18 def _send_cmd(self, code, data): |
17 cmd = cmd_proto.cmd(self.seq, code, data) | 19 cmd = cmd_proto.cmd(self.seq, code, data) |
32 pass | 34 pass |
33 | 35 |
34 def wait_reply(self, tmo=None): | 36 def wait_reply(self, tmo=None): |
35 import select | 37 import select |
36 | 38 |
37 if tmo is None: | 39 frame = '' |
38 select.select((self.fo,), (), ()) | 40 while True: |
39 else: | 41 if tmo == None: |
40 select.select((self.fo,), (), (), tmo) | 42 rlist, wlist, xlist = select.select((self.fo,), (), ()) |
41 pass | 43 else: |
42 frame = self.fo.read() | 44 rlist, wlist, xlist = select.select((self.fo,), (), (), tmo) |
45 pass | |
46 if not rlist: | |
47 break | |
48 frame = frame + self.fo.read() | |
49 if len(frame) >= 4 and \ | |
50 len(frame) >= (ord(frame[3]) + | |
51 cmd_proto.cmd.FRAME_OVERHEAD): | |
52 break | |
53 tmo = 0.05 | |
54 pass | |
55 | |
56 if not frame: | |
57 return None | |
58 | |
43 cmd = cmd_proto.cmd() | 59 cmd = cmd_proto.cmd() |
44 cmd.from_frame(frame) | 60 r = cmd.from_frame(frame) |
61 if r: | |
62 return None | |
45 return cmd | 63 return cmd |
46 | 64 |
47 def idle(self): | 65 def idle(self): |
48 self.seq = (self.seq + 1) % 256 | 66 self.seq = (self.seq + 1) % 256 |
49 | 67 |
50 ptn, nbits = tms_ptns.TMS_IDLE_SEQ | 68 if self.state == self.ST_RESET: |
51 self.send_tms(ptn, nbits) | 69 ptn, nbits = tms_ptns.TMS_RESET_2_IDLE |
70 else: | |
71 ptn, nbits = tms_ptns.TMS_IDLE_SEQ | |
72 pass | |
73 self._send_tms(ptn, nbits) | |
52 | 74 |
53 self.state = self.ST_IDLE | 75 self.state = self.ST_IDLE |
54 pass | 76 pass |
55 | 77 |
56 def go_shift_IR(self): | 78 def go_shift_IR(self): |
57 if self.state == self.ST_SHIFT_IR: | 79 if self.state == self.ST_SHIFT_IR: |
58 return | 80 return |
59 | 81 |
60 if self.state == self.ST_IDLE: | 82 if self.state == self.ST_IDLE: |
61 ptn, ptn_nbits = tms_ptns.TMS_CAP_IR | 83 ptn, ptn_nbits = tms_ptns.TMS_SHIFT_IR |
62 self.send_tms(ptn, nbits) | 84 self._send_tms(ptn, ptn_nbits) |
63 elif self.state == self.ST_SHIFT_DR: | 85 elif self.state == self.ST_EXIT1_DR: |
64 ptn, ptn_nbits = tms_ptns.TMS_SHIFT_DR_2_CAP_IR | 86 ptn, ptn_nbits = tms_ptns.TMS_EXIT1_DR_2_SHIFT_IR |
65 self.send_tms(ptn, nbits) | 87 self._send_tms(ptn, ptn_nbits) |
66 else: | 88 else: |
67 raise RuntimeError, 'Transite to shift IR state from invalid state' | 89 raise RuntimeError, 'Transite to shift IR state from invalid state' |
68 self.state = self.ST_SHIFT_IR | 90 self.state = self.ST_SHIFT_IR |
69 pass | 91 pass |
70 | 92 |
71 def go_shift_DR(self): | 93 def go_shift_DR(self): |
72 if self.state == self.ST_SHIFT_DR: | 94 if self.state == self.ST_SHIFT_DR: |
73 return | 95 return |
74 | 96 |
75 if self.state == self.ST_IDLE: | 97 if self.state == self.ST_IDLE: |
76 ptn, ptn_nbits = tms_ptns.TMS_CAP_DR | 98 ptn, ptn_nbits = tms_ptns.TMS_SHIFT_DR |
77 self.send_tms(ptn, nbits) | 99 self._send_tms(ptn, ptn_nbits) |
78 elif self.state == self.ST_SHIFT_IR: | 100 elif self.state == self.ST_EXIT1_IR: |
79 ptn, ptn_nbits = tms_ptns.TMS_SHIFT_IR_2_CAP_DR | 101 ptn, ptn_nbits = tms_ptns.TMS_EXIT1_IR_2_SHIFT_DR |
80 self.send_tms(ptn, nbits) | 102 self._send_tms(ptn, ptn_nbits) |
81 else: | 103 else: |
82 raise RuntimeError, 'Transite to shift DR state from invalid state' | 104 raise RuntimeError, 'Transite to shift DR state from invalid state' |
83 pass | 105 pass |
84 self.state = self.ST_SHIFT_DR | 106 self.state = self.ST_SHIFT_DR |
85 pass | 107 pass |
90 if self.state != self.ST_SHIFT_IR: | 112 if self.state != self.ST_SHIFT_IR: |
91 raise RuntimeError, 'Invalid state' | 113 raise RuntimeError, 'Invalid state' |
92 | 114 |
93 self._send_nbits_data_cmd(cmd_proto.CPCMD_SHIFT_TDI, | 115 self._send_nbits_data_cmd(cmd_proto.CPCMD_SHIFT_TDI, |
94 nbits, data) | 116 nbits, data) |
117 self.state = self.ST_EXIT1_IR | |
95 pass | 118 pass |
96 | 119 |
97 def shift_DR(self, data, nbits): | 120 def shift_DR(self, data, nbits): |
98 self.seq = (self.seq + 1) % 256 | 121 self.seq = (self.seq + 1) % 256 |
99 | 122 |
100 if self.state != self.ST_SHIFT_DR: | 123 if self.state != self.ST_SHIFT_DR: |
101 raise RuntimeError, 'Invalid state' | 124 raise RuntimeError, 'Invalid state' |
102 | 125 |
103 self._send_nbits_data_cmd(cmd_proto.CPCMD_SHIFT_TDI, | 126 self._send_nbits_data_cmd(cmd_proto.CPCMD_SHIFT_TDI, |
104 nbits, data) | 127 nbits, data) |
128 self.state = self.ST_EXIT1_DR | |
105 pass | 129 pass |
106 | 130 |
107 def shift_DR_n_out(self, data, nbits): | 131 def shift_DR_n_out(self, data, nbits): |
108 self.seq = (self.seq + 1) % 256 | 132 self.seq = (self.seq + 1) % 256 |
109 | 133 |
110 if self.state != self.ST_SHIFT_DR: | 134 if self.state != self.ST_SHIFT_DR: |
111 raise RuntimeError, 'Invalid state' | 135 raise RuntimeError, 'Invalid state' |
112 | 136 |
113 self._send_nbits_data_cmd(cmd_proto.CPCMD_SHIFT_TDI_TDO, | 137 self._send_nbits_data_cmd(cmd_proto.CPCMD_SHIFT_TDI_TDO, |
114 nbits, data) | 138 nbits, data) |
139 self.state = self.ST_EXIT1_DR | |
115 pass | 140 pass |
116 | 141 |
117 def reset(self): | 142 def reset(self): |
118 self._send_cmd(cmd_proto.CPCMD_TRST, '') | 143 self._send_cmd(cmd_proto.CPCMD_TRST, '') |
119 self.state = self.ST_RESET | 144 self.state = self.ST_RESET |
120 pass | 145 pass |
121 pass | 146 pass |
122 | 147 |
123 def _extract_nbits_data(nbits_data): | 148 def _extract_nbits_data(nbits_data): |
124 nbits = ord(nbits_data[0]) | (ord(nbits_data[1] << 8)) | 149 nbits = ord(nbits_data[0]) | (ord(nbits_data[1]) << 8) |
125 return nbits, nbits_data[2:] | 150 return nbits, nbits_data[2:] |
126 | 151 |
127 def _get_bit(data, bit_idx): | 152 def _get_bit(data, bit_idx): |
128 byte_off = bit_idx / 8 | 153 byte_off = bit_idx / 8 |
129 bit_off = bit_idx % 8 | 154 bit_off = bit_idx % 8 |
131 | 156 |
132 def identify_components(dev): | 157 def identify_components(dev): |
133 dev.go_shift_IR() | 158 dev.go_shift_IR() |
134 reply = dev.wait_reply() | 159 reply = dev.wait_reply() |
135 if reply.code != cmd_proto.CPCMD_ACK: | 160 if reply.code != cmd_proto.CPCMD_ACK: |
136 raise RutimeError, 'invliad reply code 0x%02x' % (reply.code) | 161 raise RuntimeError, 'invalid reply code 0x%02x' % (reply.code) |
162 | |
163 dev.shift_IR('\x02', 4) | |
164 reply = dev.wait_reply() | |
165 if reply.code != cmd_proto.CPCMD_ACK: | |
166 raise RuntimeError, 'invalid reply code 0x%02x' % (reply.code) | |
137 | 167 |
138 dev.go_shift_DR() | 168 dev.go_shift_DR() |
139 dev.shift_DR('\xff' * 253, 253 * 8) | 169 reply = dev.wait_reply() |
140 reply = dev.wait_reply() | 170 if reply.code != cmd_proto.CPCMD_ACK: |
171 raise RuntimeError, 'invalid reply code 0x%02x' % (reply.code) | |
172 | |
173 dev.shift_DR_n_out('\xff' * 252, 252 * 8) | |
174 reply = dev.wait_reply() | |
175 if not reply: | |
176 raise RuntimeError, 'Invalid replied message' | |
141 if reply.code != cmd_proto.CPCMD_DATA: | 177 if reply.code != cmd_proto.CPCMD_DATA: |
142 raise RutimeError, 'invliad reply code 0x%02x' % (reply.code) | 178 raise RuntimeError, 'invalid replied code 0x%02x %s' % (reply.code, repr(reply)) |
143 | 179 |
144 nbits, data = _extract_nbits_data(reply.data) | 180 nbits, data = _extract_nbits_data(reply.data) |
145 | 181 |
146 components = [] | 182 components = [] |
147 i = 0 | 183 i = 0 |