Mercurial > avr_jtag
annotate py_avrjtag/tms_ptns.py @ 13:1ea479d26fce tip
Make sure shifting phase and add bypass.py.
- shifting phase is started after entering SHIFT state
Transition from CAP to SHIFT does not induce shifting.
- shifting phase is stoped after leaving SHIFT state.
Transition from SHIFT to EXIT1 also induce a bit of shifting.
author | Thinker K.F. Li <thinker@branda.to> |
---|---|
date | Wed, 25 Feb 2009 20:08:29 +0800 |
parents | cc106f278d7d |
children |
rev | line source |
---|---|
10
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
1 TMS_IDLE_SEQ = ('\x1f', 6) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
2 TMS_RESET_SEQ = ('\x1f', 5) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
3 TMS_RESET_2_IDLE = ('\x00', 1) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
4 |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
5 TMS_CAP_DR = ('\x01', 2) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
6 TMS_CAP_IR = ('\x03', 3) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
7 TMS_SHIFT_2_IDLE = ('\x03', 3) |
6
42dec3428c77
Define TMS transition patterns
Thinker K.F. Li <thinker@branda.to>
parents:
diff
changeset
|
8 TMS_SHIFT_DR_2_IDLE = TMS_SHIFT_2_IDLE |
42dec3428c77
Define TMS transition patterns
Thinker K.F. Li <thinker@branda.to>
parents:
diff
changeset
|
9 TMS_SHIFT_IR_2_IDLE = TMS_SHIFT_2_IDLE |
10
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
10 TMS_SHIFT_DR_2_CAP_IR = ('\x0f', 5) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
11 TMS_SHIFT_IR_2_CAP_DR = ('\x07', 4) |
6
42dec3428c77
Define TMS transition patterns
Thinker K.F. Li <thinker@branda.to>
parents:
diff
changeset
|
12 |
10
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
13 TMS_SHIFT_DR = ('\x01', 3) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
14 TMS_SHIFT_IR = ('\x03', 4) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
15 TMS_EXIT1_2_IDLE = ('\x01', 2) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
16 TMS_EXIT1_DR_2_IDLE = TMS_EXIT1_2_IDLE |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
17 TMS_EXIT1_IR_2_IDLE = TMS_EXIT1_2_IDLE |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
18 TMS_EXIT1_2_PAUSE = ('\x00', 1) |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
19 TMS_EXIT1_DR_2_PAUSE = TMS_EXIT1_2_PAUSE |
cc106f278d7d
Get identify of components
Thinker K.F. Li <thinker@branda.to>
parents:
6
diff
changeset
|
20 TMS_EXIT1_IR_2_PAUSE = TMS_EXIT1_2_PAUSE |
13
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
21 TMS_EXIT1_IR_2_SHIFT_DR = ('\x03', 4) |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
22 TMS_EXIT1_DR_2_SHIFT_IR = ('\x07', 5) |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
23 TMS_EXIT1_2_EXIT2 = ('\x02', 2) |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
24 TMS_EXIT1_DR_2_EXIT2_DR = TMS_EXIT1_2_EXIT2 |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
25 TMS_EXIT1_IR_2_EXIT2_IR = TMS_EXIT1_2_EXIT2 |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
26 TMS_EXIT1_2_SHIFT = ('\x02', 3) |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
27 TMS_EXIT1_DR_2_SHIFT_DR = TMS_EXIT1_2_SHIFT |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
28 TMS_EXIT1_IR_2_SHIFT_IR = TMS_EXIT1_2_SHIFT |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
29 TMS_EXIT1_DR_2_CAP_IR = ('\x07', 4) |
1ea479d26fce
Make sure shifting phase and add bypass.py.
Thinker K.F. Li <thinker@branda.to>
parents:
10
diff
changeset
|
30 TMS_EXIT1_IR_2_CAP_DR = ('\x03', 3) |